AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 63

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AU80610004653AAS LBMG

Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet

Specifications of AU80610004653AAS LBMG

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Processor Configuration Registers
1.5.32
1.5.33
Datasheet
Note:
GBSM - Graphics Base of Stolen Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the base address of graphics data stolen DRAM memory. BIOS
determines the base of graphics data stolen memory by subtracting the graphics data
stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0 offset
B0 bits 15:04).
This register is locked and becomes Read Only when the D_LCK bit in the SMRAM
register is set.
BGSM - Base of GTT Stolen Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the base address of stolen DRAM memory for the GTT. BIOS
determines the base of GTT stolen memory by subtracting the GTT graphics stolen
memory size (PCI Device 0 offset 52 bits 9:8) from the graphics stolen memory base
(PCI Device 0 offset A4 bits 31:20).
31:20
19:0
Bit
Access
RW-L
RO
Default
00000h
Value
000h
0/0/0/PCI
A4-A7h
00000000h
32 bits
0/0/0/PCI
A8-ABh
00000000h
32 bits
RW-L; RO;
RW-L; RO;
RST/
PWR
Core
Core
Graphics Base of Stolen Memory
(GBSM):
This register contains bits 31 to 20 of the
base address of stolen DRAM memory.
BIOS determines the base of graphics
stolen memory by subtracting the
graphics stolen memory size (PCI Device
0 offset 52 bits 6:4) from TOLUD (PCI
Device 0 offset B0 bits 15:04).
Note: This register is locked and becomes
Read Only when the D_LCK bit or
MSLOCK in the SMRAM register is set.
Reserved
Description
63

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