AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 84
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1.6.12
1.6.13
84
15:13
31:28
12:9
8:0
Bit
Bit
27
Access
Access
C0CYCTRKREFR - Channel 0 CYCTRK REFR
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Channel 0 CYCTRK Refresh Registers.
RW
RW
C0CKECTRL - Channel 0 CKE Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
CKE controls for Channel 0
RW
RO
RO
000000000
Default
Default
Value
0000b
Value
0000b
000b
0b
b
RST/PWR
RST/PWR
Core
Core
Core
Core
Core
Reserved
Same Rank PALL to REF Delayed
(C0sd_cr_pchgall_rfsh):
This configuration register indicates the minimum
allowed spacing (in DRAM clocks) between the PRE-ALL
and REF commands to the same rank.
Same Rank REF to REF Delayed
(C0sd_cr_rfsh_rfsh):
This configuration register indicates the minimum
allowed spacing (in DRAM clocks) between two REF
commands to same ranks.
Reserved
start the self-refresh exit sequence
(sd0_cr_srcstart):
This configuration register indicates the request to start
the self-refresh exit sequence
0/0/0/MCHBAR
25B-25Ch
0000h
16 bits
0/0/0/MCHBAR
260-263h
00000800h
32 bits
RO; RW;
RW; RW-L; RO;
Processor Configuration Registers
Description
Description
Datasheet
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