AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 96

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AU80610004653AAS LBMG

Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet

Specifications of AU80610004653AAS LBMG

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
96
5:2
Bit
1
0
Access
RW-L-P
RS-WC
RW-P
Default
Value
0000b
0b
0b
RST/PWR
Core
Core
Core
Digital Hysteresis Amount (DHA):
This bit determines whether no offset, 1 LSB, 2... 15 is
used for hysteresis for the trip points.
0000 = digital hysteresis disabled, no offset added to trip
temperature
0001 offset is 1 LSB added to each trip temperature
when tripped
0110 ~3.0 °C (Recommended setting)
1110 added to each trip temperature when tripped
1111 added to each trip temperature when tripped
Thermal Sensor Comparator Select (TSCS):
This bit muxes between the two analog comparator
outputs. Normally Catastrophic is used. Lockable via TCO
bit 7.
0 = Catastrophic
1 = Hot
In Use (IU):
After a full IMCRESET, a read to this bit returns a 0.
After the first read, subsequent reads will return a 1.
A write of a 1 to this bit will reset the next read value to
0.
Writing a 0 to this bit has no effect.
Software can poll this bit until it reads a 0, and will then
own the usage of the thermal sensor.
This bit has no other effect on the hardware, and is only
used as a semaphore among various independent
software threads that may need to use the thermal
sensor.
Software that reads this register but does not intend to
claim exclusive access of the thermal sensor must write a
one to this bit if it reads a 0, in order to allow other
software threads to claim it.
See also THERM3 bit 7 and IUB, which are independent
additional semaphore bits.
Software semaphore bit.
Processor Configuration Registers
Description
Datasheet

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