LP3985IM5-3.3 National Semiconductor, LP3985IM5-3.3 Datasheet

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LP3985IM5-3.3

Manufacturer Part Number
LP3985IM5-3.3
Description
IC, LDO VOLT REG, 3.3V, 150mA, 5-SOT-23
Manufacturer
National Semiconductor
Datasheet

Specifications of LP3985IM5-3.3

Primary Input Voltage
6V
Output Voltage Fixed
3.3V
Dropout Voltage Vdo
100mV
No. Of Pins
5
Output Current
150mA
Operating Temperature Range
-40°C To +125°C
Termination Type
SMD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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© 2005 National Semiconductor Corporation
LP3985
Micropower, 150mA Low-Noise Ultra Low-Dropout CMOS
Voltage Regulator
General Description
The LP3985 is designed for portable and wireless applica-
tions with demanding performance and space requirements.
The LP3985 is stable with a small 1µF
high-quality tantalum output capacitor. The micro SMD re-
quires the smallest possible PC board area - the total appli-
cation circuit area can be less than 2.0mm x 2.5mm, a
fraction of a 1206 case size.
The LP3985’s performance is optimized for battery powered
systems to deliver ultra low noise, extremely low dropout
voltage and low quiescent current. Regulator ground current
increases only slightly in dropout, further prolonging the
battery life.
An optional external bypass capacitor reduces the output
noise without slowing down the load transient response.
Fast start-up time is achieved by utilizing an internal
power-on circuit that actively pre-charges the bypass capaci-
tor.
Power supply rejection is better than 50 dB at low frequen-
cies and starts to roll off at 1kHz. High power supply rejection
is maintained down to low input voltage levels common to
battery operated circuits.
The device is ideal for mobile phone and similar battery
powered wireless applications. It provides up to 150 mA,
from a 2.5V to 6V input. The LP3985 consumes less than
1.5µA in disable mode and has fast turn-on time less than
200µs.
The LP3985 is available in a 5 bump small bump micro SMD,
a 5 bump large bump micro SMD, a 5 bump thin micro SMD
and a 5 pin SOT-23 package. Performance is specified for
−40˚C to +125˚C temperature range and is available in 2.5V,
Typical Application Circuit
Note: Pin Numbers in parenthesis indicate micro SMD package.
* Optional Noise Reduction Capacitor.
DS101364
±
30% ceramic or
2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V. 3.1V, 3.2V, 3.3V, 4.7V,
4.75V, 4.8V and 5.0V output voltages. For other output volt-
age options between 2.5V to 5.0V or for a dual LP3985,
please contact National Semiconductor sales office.
Key Specifications
n 2.5 to 6.0V input range
n 150mA guaranteed output
n 50dB PSRR at 1kHz
n ≤1.5µA quiescent current when shut down
n Fast Turn-On time: 200 µs (typ.)
n 100mV maximum dropout with 150mA load
n 30µVrms output noise (typ) over 10Hz to 100kHz
n −40 to +125˚C junction temperature range for operation
n 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.1V, 3.2V,
Features
n Miniature 5-I/O micro SMD and SOT-23-5 package
n Logic controlled enable
n Stable with ceramic and high quality tantalum capacitors
n Fast turn-on
n Thermal shutdown and short-circuit current limit
Applications
n CDMA cellular handsets
n Wideband CDMA cellular handsets
n GSM cellular handsets
n Portable information appliances
3.3V, 4.7V, 4.75V, 4.8V and 5.0V outputs standard
10136402
@
V
IN
= V
OUT
+ 0.2V
www.national.com
August 2005

Related parts for LP3985IM5-3.3

LP3985IM5-3.3 Summary of contents

Page 1

... National Semiconductor Corporation 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V. 3.1V, 3.2V, 3.3V, 4.7V, 4.75V, 4.8V and 5.0V output voltages. For other output volt- age options between 2.5V to 5.0V or for a dual LP3985, please contact National Semiconductor sales office. ± 30% ceramic or Key Specifications n 2 ...

Page 2

Block Diagram Pin Description Name V EN GND V OUT V IN BYPASS * The pin numbering scheme for the micro SMD package was revised in April 2002 to conform to JEDEC standard. Only the pin numbers were revised. No ...

Page 3

Ordering Information BP refers to 0.170mm bump size, 0.900mm height for micro SMD Package Output Grade Voltage (V) 2.5 STD 2.6 STD 2.7 STD 2.8 STD 2.85 STD 2.9 STD 3.0 STD 3.1 STD 3.2 STD 3.3 STD 4.7 STD ...

Page 4

... Units, Tape and Reel LP3985IM5-2.5 LP3985IM5X-2.5 LP3985IM5-2.6 LP3985IM5X-2.6 LP3985IM5-2.7 LP3985IM5X-2.7 LP3985IM5-2.8 LP3985IM5X-2.8 LP3985IM5-285 LP3985IM5X-285 LP3985IM5-2.9 LP3985IM5X-2.9 LP3985IM5-3.0 LP3985IM5X-3.0 LP3985IM5-3.1 LP3985IM5X-3.1 LP3985IM5-3.2 LP3985IM5X-3.2 LP3985IM5-3.3 LP3985IM5X-3.3 LP3985IM5-4.7 LP3985IM5X-4.7 LP3985IM5-5.0 LP3985IM5X-5.0 4 Package Marking LCSB LCTB LCUB LCJB LCXB LCYB LCRB LCZB LDPB LDQB LDRB ...

Page 5

... OUT = 25˚C. Limits appearing in boldface type apply over the entire junction J Conditions I = 1mA OUT 0.5V) to 6.0V, IN OUT(nom) For 4.7 to 5.0 options For all other options 150 mA OUT LP3985IM5 (SOT23-5) LP3985 (micro SMD 1V, IN OUT(nom 150 mA (Figure 1) OUT 0.2V, IN OUT(nom kHz (Figure 2) ...

Page 6

... Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Additional information on lead temperature and pad temperature can be found in National Semiconductor Application Note (AN-1112). Note 4: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula the ambient temperature, and θ ...

Page 7

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Output Voltage Change vs Temperature Ground Current vs Load Current 10136408 FIGURE 1. Line Transient Input Test Signal FIGURE 2. PSRR Input Test Signal ...

Page 8

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Ground Current vs V Short Circuit Current (micro SMD) Short Circuit Current (SOT) www.national.com Unless otherwise specified 25˚C, Enable pin is tied ...

Page 9

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Short Circuit Current (SOT) Short Circuit Current (micro SMD) Output Noise Spectral Density Unless otherwise specified 25˚C, Enable pin is tied to ...

Page 10

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Ripple Rejection ( Start Up Time ( Start Up Time ( www.national.com Unless otherwise specified, ...

Page 11

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Start Up Time ( OUT Line Transient Response Load Transient Response (V Unless otherwise specified 25˚C, Enable pin is ...

Page 12

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Load Transient Response (V Enable Response ( Enable Response ( www.national.com Unless otherwise specified 25˚C, Enable ...

Page 13

Typical Performance Characteristics C = 0.01 µ 0.2V, T BYPASS IN OUT Output Impedance (V IN Application Hints EXTERNAL CAPACITORS Like any low-dropout regulator, the LP3985 requires external capacitors for regulator stability. The LP3985 is specifically ...

Page 14

... SMD MOUNTING The micro SMD package requires specific mounting tech- niques which are detailed in National Semiconductor Appli- cation Note (AN-1112). Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 5 pin package is NSMD (non-solder mask defined) type ...

Page 15

Physical Dimensions inches (millimeters) unless otherwise noted The dimensions for X1, X2 and X3 are as given: 5-Lead Small Outline Package (MF) NS Package Number MF05A micro SMD, 5 Bump, Package (BPA05) NS Package Number BPA05DNC X1 = 0.853 +/− ...

Page 16

Physical Dimensions www.national.com inches (millimeters) unless otherwise noted (Continued) micro SMD, 5 Bump, Package (BLA05) NS Package Number BLA05AEC The dimensions for X1, X2 and X3 are as given 1.006 +/- 0.03mm X2 = 1.463 +/- 0.03mm X3 ...

Page 17

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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