P82B96TD NXP Semiconductors, P82B96TD Datasheet
P82B96TD
Manufacturer Part Number
P82B96TD
Description
IC, NOR GATE, 2, QUAD, 8-SOIC
Manufacturer
NXP Semiconductors
Datasheet
1.P82B96TD.pdf
(6 pages)
Specifications of P82B96TD
Supply Voltage Range
2V To 15V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
SOIC
No. Of Pins
8
Termination Type
SMD
Supply Voltage Max
15V
Logic Family
P82B
Logic Type
Bus Buffer
Supply Voltage (max)
15 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-96
Maximum Power Dissipation
300 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 2
Propagation Delay Time
90 ns
Filter Terminals
SMD
Rohs Compliant
Yes
Features
Dual Bi-Directional Bus Buffer
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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© 1999 Fairchild Semiconductor Corporation
MM74HC02M
MM74HC02SJ
MM74HC02MTC
MM74HC02N
MM74HC02
Quad 2-Input NOR Gate
General Description
The MM74HC02 NOR gates utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of standard
CMOS integrated circuits. All gates have buffered outputs,
providing high noise immunity and the ability to drive 10
LS-TTL loads. The 74HC logic family is functionally as well
as pin-out compatible with the standard 74LS logic family.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)
Connection Diagram
Logic Diagram
Order Number
Package Number
MTC14
M14A
M14D
N14A
Pin Assignment for DIP, SOIC, SOP and TSSOP
CC
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
and ground.
DS005294.prf
Top View
Features
Typical propagation delay: 8 ns
Wide power supply range: 2–6V
Low quiescent supply current: 20
(74HC Series)
Low input current: 1 A maximum
High output current: 4 mA minimum
Package Description
September 1983
Revised February 1999
www.fairchildsemi.com
A maximum
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P82B96TD Summary of contents
Page 1
MM74HC02 Quad 2-Input NOR Gate General Description The MM74HC02 NOR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs, providing ...
Page 2
Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) OUT DC ...
Page 3
AC Electrical Characteristics Symbol Parameter Maximum Propagation PHL PLH Delay AC Electrical Characteristics V 2.0V to 6.0V pF, ...
Page 4
Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14A Package Number M14D 4 ...
Page 5
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 5 www.fairchildsemi.com ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...