AD9764ARZ Analog Devices Inc, AD9764ARZ Datasheet

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AD9764ARZ

Manufacturer Part Number
AD9764ARZ
Description
IC,D/A CONVERTER,SINGLE,14-BIT,CMOS,SOP,28PIN
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9764ARZ

Rohs Compliant
YES
Settling Time
35ns
Number Of Bits
14
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
170mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9764-EB - BOARD EVAL FOR AD9764
Data Interface
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9764ARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9764ARZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
REV. B
PRODUCT DESCRIPTION
The AD9764 is the 14-bit resolution member of the TxDAC
series of high performance, low power CMOS digital-to-analog
converters (DACs). The TxDAC family, which consists of pin
compatible 8-, 10-, 12-, and 14-bit DACs, is specifically opti-
mized for the transmit signal path of communication systems.
All of the devices share the same interface options, small outline
package and pinout, providing an upward or downward compo-
nent selection path based on performance, resolution and cost.
The AD9764 offers exceptional ac and dc performance while
supporting update rates up to 125 MSPS.
The AD9764’s flexible single-supply operating range of 2.7 V to
5.5 V and low power dissipation are well suited for portable and
low power applications. Its power dissipation can be further
reduced to a mere 45 mW with a slight degradation in performance
by lowering the full-scale current output. Also, a power-down
mode reduces the standby power dissipation to approximately
25 mW.
The AD9764 is manufactured on an advanced CMOS process.
A segmented current source architecture is combined with a
proprietary switching technique to reduce spurious components
and enhance dynamic performance. Edge-triggered input
latches and a 1.2 V temperature compensated bandgap refer-
ence have been integrated to provide a complete monolithic
DAC solution. Flexible supply options support +3 V and +5 V
CMOS logic families.
The AD9764 is a current-output DAC with a nominal full-scale
output current of 20 mA and > 100 k output impedance.
TxDAC is a registered trademark of Analog Devices, Inc.
*Patent pending.
FEATURES
Member of Pin-Compatible TxDAC Product Family
125 MSPS Update Rate
14-Bit Resolution
Excellent SFDR and IMD
Differential Current Outputs: 2 mA to 20 mA
Power Dissipation: 190 mW @ 5 V to 45 mW @ 3 V
Power-Down Mode: 25 mW @ 5 V
On-Chip 1.20 V Reference
Single +5 V or +3 V Supply Operation
Packages: 28-Lead SOIC and TSSOP
Edge-Triggered Latches
APPLICATIONS
Communication Transmit Channel:
Instrumentation
Basestations
ADSL/HFC Modems
Differential current outputs are provided to support single-
ended or differential applications. Matching between the two
current outputs ensures enhanced dynamic performance in a
differential output configuration. The current outputs may be
tied directly to an output resistor to provide two complemen-
tary, single-ended voltage outputs or fed directly into a trans-
former. The output voltage compliance range is 1.25 V.
The on-chip reference and control amplifier are configured for
maximum accuracy and flexibility. The AD9764 can be driven
by the on-chip reference or by a variety of external reference
voltages. The internal control amplifier, which provides a wide
(>10:1) adjustment span, allows the AD9764 full-scale current
to be adjusted over a 2 mA to 20 mA range while maintaining
excellent dynamic performance. Thus, the AD9764 may operate
at reduced power levels or be adjusted over a 20 dB range to
provide additional gain ranging capabilities.
The AD9764 is available in 28-lead SOIC and TSSOP packages.
It is specified for operation over the industrial temperature range.
PRODUCT HIGHLIGHTS
1. The AD9764 is a member of the TxDAC product family that
2. Manufactured on a CMOS process, the AD9764 uses a pro-
3. On-chip, edge-triggered input CMOS latches readily interface
4. A flexible single-supply operating range of 2.7 V to 5.5 V, and
5. The current output(s) of the AD9764 can be easily config-
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
provides an upward or downward component selection path
based on resolution (8 to 14 bits), performance and cost.
prietary switching technique that enhances dynamic perfor-
mance beyond that previously attainable by higher power/cost
bipolar or BiCMOS devices.
to +3 V and +5 V CMOS logic families. The AD9764 can
support update rates up to 125 MSPS.
a wide full-scale current adjustment span of 2 mA to 20 mA,
allows the AD9764 to operate at reduced power levels.
ured for various single-ended or differential circuit topologies.
R
CLOCK
SET
0.1 F
+5V
FUNCTIONAL BLOCK DIAGRAM
REFIO
CLOCK
FS ADJ
DVDD
DCOM
SLEEP
+1.20V REF
TxDAC
World Wide Web Site: http://www.analog.com
REFLO
DIGITAL DATA INPUTS (DB13–DB0)
SEGMENTED
SWITCHES
14-Bit, 125 MSPS
50pF
®
LATCHES
D/A Converter
COMP1
0.1 F
CURRENT
© Analog Devices, Inc., 1999
SOURCE
SWITCHES
ARRAY
+5V
LSB
AD9764*
AVDD
AD9764
ACOM
COMP2
I
I
OUTA
OUTB
0.1 F

Related parts for AD9764ARZ

AD9764ARZ Summary of contents

Page 1

FEATURES Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 14-Bit Resolution Excellent SFDR and IMD Differential Current Outputs Power Dissipation: 190 Power-Down ...

Page 2

AD9764–SPECIFICATIONS DC SPECIFICATIONS ( MIN Parameter RESOLUTION 1 DC ACCURACY Integral Linearity Error (INL + MIN MAX Differential Nonlinearity (DNL + MIN MAX ANALOG ...

Page 3

DYNAMIC SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Maximum Output Update Rate (f CLOCK Output Settling Time (t ) (to 0.1%) ST Output Propagation Delay ( Glitch Impulse 1 Output Rise Time (10% to 90%) 1 Output Fall Time (10% to ...

Page 4

AD9764 DIGITAL SPECIFICATIONS Parameter DIGITAL INPUTS Logic “1” Voltage @ DVDD = +5 V Logic “1” Voltage @ DVDD = +3 V Logic “0” Voltage @ DVDD = +5 V Logic “0” Voltage @ DVDD = +3 V Logic “1” ...

Page 5

Pin No. Name Description 1 DB13 Most Significant Data Bit (MSB). 2–13 DB12–DB1 Data Bits 1–12. 14 DB0 Least Significant Data Bit (LSB). 15 SLEEP Power-Down Control Input. Active High. Contains active pull-down circuit; it may be left unterminated if ...

Page 6

AD9764 DEFINITIONS OF SPECIFICATIONS Linearity Error (Also Called Integral Nonlinearity or INL) Linearity error is defined as the maximum deviation of the actual analog output from the ideal output, determined by a straight line drawn from zero to full scale. ...

Page 7

Typical AC Characterization Curves (AVDD = +5 V, DVDD = + mA, 50 OUTFS MSPS 80 25 MSPS 75 50 MSPS 70 65 100 MSPS 0 ...

Page 8

AD9764 –70 –75 2ND HARMONIC –80 3RD HARMONIC –85 4TH HARMONIC –90 –95 000.0E+0 40.0E+6 80.0E+6 120.0E+6 Figure 12. THD vs CLOCK MHz OUT 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 0 4000 ...

Page 9

V REFIO I REF 0 SET 2k +5V CLOCK FUNCTIONAL DESCRIPTION Figure 21 shows a simplified block diagram of the AD9764. The AD9764 consists of a large PMOS current source array that is capable of providing up to ...

Page 10

AD9764 REFERENCE OPERATION The AD9764 contains an internal 1.20 V bandgap reference that can be easily disabled and overridden by an external reference. REFIO serves as either an input or output, depending on whether the internal or external reference is ...

Page 11

AVDD 1.2V AD1580 The second method may be used in a dual-supply system in which the common-mode voltage of REFIO is fixed, and I varied by an external voltage applied fier. An example of this ...

Page 12

AD9764 1.25 V for 1.00 V for an I OUTFS Operation beyond the positive compliance range will induce clipping of the output signal which severely degrades the AD9764’s linearity and distortion performance. For applications ...

Page 13

Since the AD9764 is capable of being updated up to 125 MSPS, the quality of the clock and data input signals are important in achieving the optimum performance. Operating the AD9764 with reduced logic swings and a corresponding digital supply ...

Page 14

AD9764 APPLYING THE AD9764 OUTPUT CONFIGURATIONS The following sections illustrate some typical output configura- tions for the AD9764. Unless otherwise noted assumed that I is set to a nominal 20 mA. For applications requir- OUTFS ing the optimum ...

Page 15

I and R can be selected as long as the positive compli- OUTFS LOAD ance range is adhered to. One additional consideration in this mode is the integral nonlinearity (INL) as discussed in the Ana- log Output section of this ...

Page 16

AD9764 MULTITONE PERFORMANCE CONSIDERATIONS AND CHARACTERIZATION The frequency domain performance of high speed DACs has traditionally been characterized by analyzing the spectral output of a reconstructed full-scale (i.e., 0 dBFS), single-tone sine wave at a particular output frequency and update ...

Page 17

DAC can be evaluated. Nonlinearities associated with the DAC will create spurious tones of which some may fall back into the “empty” channel thus limiting a channel’s carrier-to-noise ratio. Other spurious components falling outside the band of interest ...

Page 18

AD9764 Figure 41. Evaluation Board Schematic –18– REV. B ...

Page 19

REV. B Figure 42. Silkscreen Layer—Top Figure 43. Component Side PCB Layout (Layer 1) –19– AD9764 ...

Page 20

AD9764 Figure 44. Ground Plane PCB Layout (Layer 2) Figure 45. Power Plane PCB Layout (Layer 3) –20– REV. B ...

Page 21

REV. B Figure 46. Solder Side PCB Layout (Layer 4) Figure 47. Silkscreen Layer—Bottom –21– AD9764 ...

Page 22

AD9764 PIN 1 0.0118 (0.30) 0.0040 (0.10) PIN 1 0.006 (0.15) 0.002 (0.05) SEATING OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead, 300 Mil SOIC (R-28) 0.7125 (18.10) 0.6969 (17.70 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 1 ...

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