LPC2378FBD144 NXP Semiconductors, LPC2378FBD144 Datasheet - Page 23

• Manufacturer Part Number: LPC2378FBD144
• Description: MCU 32BIT ARM7, 10/100, USB, CAN
• Manufacturer: NXP Semiconductors

Specifications of LPC2378FBD144

• Core Size: 32bit
• No. Of I/o's: 104
• Program Memory Size: 512KB
• Ram Memory Size: 58KB
• Cpu Speed: 72MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No. Of Pwm Channels: 6
• Digital Ic Case: RoHS Compliant
• Controller Family/series: LPC23xx
• Rohs Compliant: Yes

NXP Semiconductors
LPC2377_78
Product data sheet
7.11.1.1 Features
7.11.1 USB device controller
7.11 USB interface (LPC2378 only)
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and a number (127 maximum) of peripherals. The host controller allocates the USB
bandwidth to attached devices through a token based protocol. The bus supports hot
plugging, unplugging and dynamic configuration of the devices. All transactions are
initiated by the host controller.
The two sets of pins needed by a USB device are named V
USB_UP_LED1, USB_CONNECT1, and USB_D+2, USB_D−2, USB_UP_LED2, and
USB_CONNECT2 respectively. At any given time only one of these two sets can be active
and used by the application.
The device controller enables 12 Mbit/s data exchange with a USB host controller. It
consists of register interface, serial interface engine, endpoint buffer memory, and the
DMA controller. The serial interface engine decodes the USB data stream and writes data
to the appropriate end point buffer memory. The status of a completed USB transfer or
error condition is indicated via status registers. An interrupt is also generated if enabled.
The DMA controller when enabled transfers data between the endpoint buffer and the
USB RAM.
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Physical interface:
– Attachment of external PHY chip through standard RMII interface.
– PHY register access is available via the MIIM interface.
Fully compliant with USB 2.0 specification (full speed).
Supports 32 physical (16 logical) endpoints with a 4 kB endpoint buffer RAM.
Supports Control, Bulk, Interrupt and Isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint Maximum packet size selection (up to USB maximum specification) by
software at run time.
Supports SoftConnect and GoodLink features.
While USB is in the Suspend mode, the LPC2377/78 can enter one of the reduced
power modes and wake up on a USB activity.
Supports DMA transfers with the DMA RAM of 8 kB on all non-control endpoints.
Allows dynamic switching between CPU-controlled and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 June 2010
Single-chip 16-bit/32-bit microcontrollers
BUS
, USB_D+1, USB_D−1,
LPC2377/78
© NXP B.V. 2010. All rights reserved.
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