LPC2378FBD144 NXP Semiconductors, LPC2378FBD144 Datasheet - Page 4

• Manufacturer Part Number: LPC2378FBD144
• Description: MCU 32BIT ARM7, 10/100, USB, CAN
• Manufacturer: NXP Semiconductors

Specifications of LPC2378FBD144

• Core Size: 32bit
• No. Of I/o's: 104
• Program Memory Size: 512KB
• Ram Memory Size: 58KB
• Cpu Speed: 72MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No. Of Pwm Channels: 6
• Digital Ic Case: RoHS Compliant
• Controller Family/series: LPC23xx
• Rohs Compliant: Yes

NXP Semiconductors
5. Block diagram
LPC2377_78
Product data sheet
Fig 1.
2 × CAP0/CAP1/
2 × MAT0/MAT1/
EINT3 to EINT0
power domain 2
(1) LPC2378 only.
CAP2/CAP3
2 × PCAP1
P0, P1, P2,
6 × PWM1
4 × MAT2,
8 × AD0
ALARM
LPC2377/78 block diagram
RMII(8)
RTCX1
RTCX2
P0, P2
P0, P1
AOUT
P3, P4
MAT3
VBAT
LPC2377/78
HIGH-SPEED
ETHERNET
MAC WITH
OSCILLATOR
104 PINS
GPI/O
DMA
TOTAL
EXTERNAL INTERRUPTS
RTC
CAPTURE/COMPARE
2 kB BATTERY RAM
SYSTEM CONTROL
WATCHDOG TIMER
A/D CONVERTER
D/A CONVERTER
TIMER0/TIMER1/
TIMER2/TIMER3
LEGACY GPI/O
56 PINS TOTAL
AHB2
PWM1
SRAM
SRAM
16 kB
32 kB
CONTROLLERS
SRAM
INTERNAL
CLOCK
REAL-
TIME
FLASH
512 kB
All information provided in this document is subject to legal disclaimers.
FLASH
BRIDGE
MASTER
PORT
TRST
AHB
ARM7TDMI-S
Rev. 5 — 17 June 2010
TMS
TEST/DEBUG
INTERFACE
TCK TDO
AHB BRIDGE
APB BRIDGE
AHB TO
TDI
AHB TO
EXTIN0
trace signals
BRIDGE
SLAVE
AHB
PORT
DBGEN
CONTROLLER
INTERRUPT
VECTORED
system
clock
PLL
Single-chip 16-bit/32-bit microcontrollers
SPI, SSP0 INTERFACE
UART0, UART2, UART3
RESET
SSP1 INTERFACE
I
SD/MMC CARD
I
SRAM
CAN1, CAN2
2
2
8 kB
S INTERFACE
INTERFACE
C0, I
XTAL2
AHB1
CONTROLLER
UART1
INTERNAL RC
OSCILLATOR
FUNCTIONS
2
GP DMA
C1, I
CONTROLLER
XTAL1
SYSTEM
EXTERNAL
AND DMA
MEMORY
USB WITH
4 kB RAM
2
C2
(1)
V
DDA
002aac574
V
DD(3V3)
(1)
LPC2377/78
© NXP B.V. 2010. All rights reserved.
A[15:0]
BLS0
V
2 × USB_D+/USB_D−
2 × USB_CONNECT
2 × USB_UP_LED
I2SRX_CLK
I2STX_CLK
I2SRX_WS
I2STX_WS
I2SRX_SDA
I2STX_SDA
SCK, SCK0
MOSI, MOSI0
MISO, MISO0
SSEL, SSEL0
SCK1
MOSI1
MISO1
SSEL1
MCICLK, MCIPWR
MCICMD,
MCIDAT[3:0]
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
TXD1
RXD1
DTR1, RTS1
DSR1, CTS1, DCD1,
RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
VREF
V
V
D[7:0]
OE, CS0, CS1,
BUS
SSA
DD(DCDC)(3V3)
, V
SS
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