CS4382-KQ Cirrus Logic Inc, CS4382-KQ Datasheet - Page 2

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CS4382-KQ

Manufacturer Part Number
CS4382-KQ
Description
D/A Converter (D-A) IC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS4382-KQ

No. Of Pins
48
Peak Reflow Compatible (260 C)
No
Supply Voltage Max
5.5V
No. Of Bits
24 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
No. Of Channels
8
Interface Type
Serial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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TABLE OF CONTENTS
LIST OF FIGURES
2
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product informa-
tion describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any
kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied
on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining
to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as
the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing
this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property
rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only for use within your organization
with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising
or promotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material
and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained
from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law
and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH
APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Purchase of I
those components in a standard I
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks
or service marks of their respective owners.
1. CHARACTERISTICS AND SPECIFICATIONS ................................................................. 4
2. REGISTER QUICK REFERENCE ................................................................................... 14
3. REGISTER DESCRIPTION ............................................................................................. 15
4. PIN DESCRIPTION .......................................................................................................... 24
Figure 1. Serial Mode Input Timing ......................................................................................... 8
Figure 2. Direct Stream Digital - Serial Audio Input Timing ..................................................... 9
Figure 3. Control Port Timing - I
Figure 4. Control Port Timing - SPI Format ........................................................................... 11
2
5. APPLICATIONS .............................................................................................................. 27
6. CONTROL PORT INTERFACE ....................................................................................... 28
7. PARAMETER DEFINITIONS ........................................................................................... 38
8. REFERENCES ................................................................................................................. 38
9. PACKAGE DIMENSIONS ............................................................................................... 39
C components of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys a license under the Phillips I
5.1 Grounding and Power Supply Decoupling ........................................................... 27
5.2 Oversampling Modes ........................................................................................... 27
5.3 Recommended Power-up Sequence ................................................................... 27
5.4 Analog Output and Filtering ................................................................................. 27
5.5 Interpolation Filter ................................................................................................ 27
5.6 Clock Source Selection ........................................................................................ 28
5.7 Using DSD mode ................................................................................................. 28
6.1 Enabling the Control Port ..................................................................................... 28
6.2 Format Selection .................................................................................................. 28
6.3 I
6.4 SPI Format ........................................................................................................... 29
6.5 Memory Address Pointer (MAP)
2
C Format ............................................................................................................ 29
2
C system.
6.3.1 Writing in I
6.3.2 Reading in I
6.4.1 Writing in SPI ..................................................................................29
2
C Format ........................................................................... 10
2
C Format .......................................................................29
2
C Format ....................................................................29
..................................................................... 30
2
C Patent Rights to use
CS4382

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