LM12458CIV National Semiconductor, LM12458CIV Datasheet

A/D Converter (A-D) IC

LM12458CIV

Manufacturer Part Number
LM12458CIV
Description
A/D Converter (A-D) IC
Manufacturer
National Semiconductor
Datasheet

Specifications of LM12458CIV

Resolution (bits)
13bit
Sampling Rate
114kSPS
Input Channel Type
Differential, Single Ended
Data Interface
Parallel
No. Of Pins
44
Input Channels Per Adc
8
Mounting Type
Surface Mount
No. Of Channels
1
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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© 2006 National Semiconductor Corporation
LM12454/LM12458/LM12H458
12-Bit + Sign Data Acquisition System with
Self-Calibration
General Description
The LM12458, and LM12H458 are highly integrated Data
Acquisition Systems. Operating on just 5V, they combine a
fully-differential self-calibrating (correcting linearity and zero
errors) 13-bit (12-bit + sign) analog-to-digital converter
(ADC) and sample-and-hold (S/H) with extensive analog
functions and digital functionality. Up to 32 consecutive con-
versions, using two’s complement format, can be stored in
an internal 32-word (16-bit wide) FIFO data buffer. An inter-
nal 8-word RAM can store the conversion sequence for up to
eight acquisitions through the LM12(H)458’s eight-input mul-
tiplexer. The obsolete LM12454 has a four-channel multi-
plexer, a differential multiplexer output, and a differential S/H
input. The LM12(H)458 can also operate with 8-bit + sign
resolution and in a supervisory “watchdog” mode that com-
pares an input signal against two programmable limits.
Programmable acquisition times and conversion rates are
possible through the use of internal clock-driven timers. The
reference voltage input can be externally generated for ab-
solute or ratiometric operation or can be derived using the
internal 2.5V bandgap reference.
All registers, RAM, and FIFO are directly addressable
through the high speed microprocessor interface to either an
8-bit or 16-bit data bus. The LM12(H)458 includes a direct
memory access (DMA) interface for high-speed conversion
data transfer.
Additional applications information can be found in applica-
tions notes AN-906, AN-947 and AN-949.
TRI-STATE
AT
®
is a registered trademark of International Business Machines Corporation.
®
is a registered trademark of National Semiconductor Corporation.
DS011264
Key Specifications
(f
Features
n Three operating modes: 12-bit + sign, 8-bit + sign, and
n Single-ended or differential inputs
n Built-in Sample-and-Hold and 2.5V bandgap reference
n Instruction RAM and event sequencer
n 8-channel multiplexer
n 32-word conversion FIFO
n Programmable acquisition times and conversion rates
n Self-calibration and diagnostic mode
n 8- or 16-bit wide data bus microprocessor or DSP
Applications
n Data Logging
n Instrumentation
n Process Control
n Energy Management
n Inertial Guidance
j
j
j
j
j
j
j
j
j
j
CLK
“watchdog”
interface
Resolution
13-bit conversion time
9-bit conversion time
13-bit Through-put rate
Comparison time
ILE
V
Power Consumption
Stand-by mode
Single supply
= 5 MHz; 8 MHz, H)
(“watchdog” mode)
IN
range
12-bit + sign or 8-bit + sign
30 mW, 34 mW (H) (max)
140k samples/s (H) (min)
8.8 µs, 5.5 µs (H) (max)
4.2 µs, 2.6 µs (H) (max)
88k samples/s (min),
1.4 µs (H) (max)
±
February 2006
2.2 µs (max),
www.national.com
1 LSB (max)
GND to V
50 µW (typ)
3V to 5.5V
A
+

Related parts for LM12458CIV

LM12458CIV Summary of contents

Page 1

... Additional applications information can be found in applica- tions notes AN-906, AN-947 and AN-949. TRI-STATE ® registered trademark of National Semiconductor Corporation. AT ® registered trademark of International Business Machines Corporation. © 2006 National Semiconductor Corporation Key Specifications ( MHz ...

Page 2

... Order Part Number NS Package LM12H458CIV V44A (PLCC) LM12H458CIVX V44A (PLCC) (Tape and Reel) LM12H458CIVF VGZ44A (PQFP) LM12454CIV * V44A (PLCC) LM12458CIV V44A (PLCC) LM12458CIVX V44A (PLCC) (Tape and Reel) LM12458CIVF * VGZ44A (PQFP) Order Number LM12458CIVF or LM12H458CIVF NS Package Number VGZ44A 01126402 2 01126434 ...

Page 3

Functional Diagrams LM12454 The LM12(H)454 is obsolete LM12(H)458 3 01126401 01126421 www.national.com ...

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... Absolute Maximum Ratings (Notes Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V + and Voltage at Input and Output Pins, except analog inputs Voltage at Analog Inputs |V + − Input Current at Any Pin (Note 3) ...

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Converter Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V 12-bit + sign conversion mode, f CLK ≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless V and V REF+ REF− ...

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Converter AC Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V 12-bit + sign conversion mode, f CLK ≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless V and V REF+ ...

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DC Characteristics (Notes The following specifications apply to the LM12454, LM12458, and LM12H458 for 8.0 MHz (LM12H454/ CLK CLK face limits apply for MIN Symbol ...

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Digital Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V Boldface limits apply for Symbol Parameter V Logical “1” Input Voltage IN(1) V Logical “0” Input Voltage IN(0) I ...

Page 9

Digital Timing Characteristics Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test ...

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− V REF REF+ REF− − IN+ IN− GND ≤ V ≤V + IN+ A GND ≤ V ≤V + IN− A FIGURE 1. The General Case of Output Digital Code vs. ...

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− V REF REF+ REF− FIGURE 3. The General Case of the − V REF REF+ REF− FIGURE 4. The Specific Case of the V 01126424 Operating Range ...

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FIGURE 6. Simplified Error Curve vs. Output Code without Auto-Calibration or Auto-Zero Cycles www.national.com FIGURE 5. Transfer Characteristic 12 01126404 01126405 ...

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FIGURE 7. Simplified Error Curve vs. Output Code after Auto-Calibration Cycle FIGURE 8. Offset or Zero Error Voltage 01126407 13 01126406 www.national.com ...

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Typical Performance Characteristics after auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. Linearity Error Change vs. Clock Frequency Linearity Error Change vs. Reference Voltage Full-Scale Error Change vs. ...

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Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. (Continued) Full-Scale Error Change vs. Reference Voltage Zero Error Change vs. Clock Frequency Zero Error Change vs. ...

Page 16

Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. (Continued) Analog Supply Current vs. Temperature Digital Supply Current vs. Temperature V Line Regulation REFOUT www.national.com (Note ...

Page 17

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. Bipolar Signal-to-Noise Ratio vs. Input Frequency Bipolar Signal-to-Noise + Distortion Ratio vs. Input Signal Level Bipolar Spectral Response with 10 kHz Sine Wave Input The following curves apply for 12-bit ...

Page 18

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Bipolar Spectral Response with 40 kHz Sine Wave Input Unipolar Signal-to-Noise Ratio vs. Input Frequency Unipolar Signal-to-Noise + Distortion Ratio vs. Input Signal Level www.national.com The following curves apply ...

Page 19

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Unipolar Spectral Response with 10 kHz Sine Wave Input Unipolar Spectral Response with 40 kHz Sine Wave Input Test Circuits and Waveforms FIGURE 9. TRI-STATE Test Circuits and Waveforms ...

Page 20

Timing Diagrams +5V ns INT, DMARQ, D0–D15 outputs Address valid to ALE low set-up time Address ...

Page 21

Timing Diagrams outputs. (Continued) FIGURE 11. Non-Multiplexed Data Bus (ALE = pulse width 9: RD high to next low 11: WR pulse width 13: WR high to next ...

Page 22

Pin Descriptions Analog and digital supply voltage pins. The A D LM12(H)454/8’s supply voltage operating range is +3.0V to +5.5V. Accuracy is guaranteed only and V + are connected to the same power ...

Page 23

Functional Description The LM12454 and LM12(H)458 are multi-functional Data Acquisition Systems that include a fully differential 12-bit- plus-sign self-calibrating analog-to-digital converter (ADC) with a two’s-complement output format, an 8-channel (LM12(H)458 4-channel (LM12454) analog multiplexer, an internal 2.5V ...

Page 24

Internal User-Programmable Registers 2.1 INSTRUCTION RAM The instruction RAM holds up to eight sequentially execut- able instructions. Each 48-bit long instruction is divided into three 16-bit sections. READ and WRITE operations can be issued to each 16-bit section using ...

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25 www.national.com ...

Page 26

Internal User-Programmable Registers Purpose Instruction RAM (RAM Pointer = 00 Instruction RAM 0 ...

Page 27

Internal User-Programmable Registers (Continued) Bits 12–15 are used to store the user-programmable acqui- sition time. The Sequencer keeps the internal S/H in the acquisition mode for a fixed number of clock cycles (nine clock cycles, for 12-bit + sign ...

Page 28

Internal User-Programmable Registers (Continued) mand (“1”) disconnects the external clock from the internal circuitry, decreases the LM12(H)454/8’s internal analog cir- cuitry power supply current, and preserves all internal RAM contents. After writing a “0” to the Standby bit, the ...

Page 29

Internal User-Programmable Registers (Continued) The completion of the short, single-sample auto-zero calibra- tion generates Interrupt 3. The completion of a full auto-zero and linearity self- calibration generates Interrupt 4. Interrupt 5 is generated when the Sequencer encounters an instruction ...

Page 30

Other Registers and Functions (Continued) ceeds the threshold stored in the instruction’s Limit #1 reg- ister. When, for example, instruction “watchdog” op- eration (Bit 11 is set high) and the input for instruction 3 meets the ...

Page 31

Sequencer (Continued) Leaving this bit reset to “0” allows the Sequencer to execute “unprogrammed” instructions, the results of which may be unpredictable. The Sequencer’s Instruction Pointer value is readable at any time and is found in the Status register ...

Page 32

Sequencer (Continued) FIGURE 15. Sequencer Logic Flow Chart (IP = Instruction Pointer) www.national.com 01126419 32 ...

Page 33

Design Considerations 6.1 REFERENCE VOLTAGE The difference in the voltages applied to the V V defines the analog input voltage span (the difference REF− between the voltages applied between two multiplexer inputs or the voltage applied to one of ...

Page 34

Design Considerations niques). Failure can result in erratic operation. Generally, a series 30Ω to 50Ω resistor in the clock line, located as close to the clock source as possible, will prevent most problems. The clock source ...

Page 35

... Physical Dimensions inches (millimeters) unless otherwise noted Order Number LM12454CIV, LM12458CIV or LM12H458CIV Order Number LM12H458CIVF or LM12458CIVF NS Package Number V44A NS Package Number VGZ44A 35 www.national.com ...

Page 36

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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