LM2642MTC National Semiconductor, LM2642MTC Datasheet - Page 18

• Manufacturer Part Number: LM2642MTC
• Description: Voltage Regulator IC
• Manufacturer: National Semiconductor

Specifications of LM2642MTC

• No. Of Pins: 28
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

www.national.com
MOSFET Selection
where Tj_max is the maximum allowed junction temperature
in the FET, Ta_max is the maximum ambient temperature,
R
and TC is the temperature coefficient of the on resistance
which is typically in the range of 10,000ppm/˚C.
If the calculated Rdson_max is smaller than the lowest value
available, multiple FETs can be used in parallel. This effec-
tively reduces the Imax term in the above equation, thus
reducing Rdson. When using two FETs in parallel, multiply
the calculated Rdson_max by 4 to obtain the Rdson_max for
each FET. In the case of three FETs, multiply by 9.
If the selected FET has an Rds value higher than 35.3Ω,
then two FETs with an Rdson less than 141mΩ (4 x 35.3mΩ)
can be used in parallel. In this case, the temperature rise on
each FET will not go to Tj_max because each FET is now
dissipating only half of the total power.
TOP FET SELECTION
The top FET has two types of losses: switching loss and
conduction loss. The switching losses mainly consist of
crossover loss and bottom diode reverse recovery loss.
Since it is rather difficult to estimate the switching loss, a
general starting point is to allot 60% of the top FET thermal
capacity to switching losses. The best way to precisely de-
termine switching losses is through bench testing. The equa-
tion for calculating the on resistance of the top FET is thus:
Example: Tj_max = 100˚C, Ta_max = 60˚C, Rqja = 60˚C/W,
Vin_min = 5.5V, Vnom = 5V, and Iload_max = 3.6A.
θja
is the junction-to-ambient thermal resistance of the FET,
(Continued)
18
When using FETs in parallel, the same guidelines apply to
the top FET as apply to the bottom FET.
Loop Compensation
The general purpose of loop compensation is to meet static
and dynamic performance requirements while maintaining
stability. Loop gain is what is usually checked to determine
small-signal performance. Loop gain is equal to the product
of control-output transfer function and the output-control
transfer function (the compensation network transfer func-
tion). Generally speaking it is a good idea to have a loop gain
slope that is -20dB /decade from a very low frequency to well
beyond the crossover frequency. The crossover frequency
should not exceed one-fifth of the switching frequency, i.e.
60kHz in the case of LM2642. The higher the bandwidth is,
the faster the load transient response speed will potentially
be. However, if the duty cycle saturates during a load tran-
sient, further increasing the small signal bandwidth will not
help. Since the control-output transfer function usually has
very limited low frequency gain, it is a good idea to place a
pole in the compensation at zero frequency, so that the low
frequency gain will be relatively large. A large DC gain
means high DC regulation accuracy (i.e. DC voltage
changes little with load or line variations). The rest of the
compensation scheme depends highly on the shape of the
control-output plot.
As shown in Figure 10, the control-output transfer function
consists of one pole (fp), one zero (fz), and a double pole at
fn (half the switching frequency). The following can be done
to create a -20dB /decade roll-off of the loop gain: Place the
first pole at 0Hz, the first zero at fp, the second pole at fz,
and the second zero at fn. The resulting output-control trans-
fer function is shown in Figure 11.
FIGURE 10. Control-Output Transfer Function
20046214