LMV324MT National Semiconductor, LMV324MT Datasheet - Page 14

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LMV324MT

Manufacturer Part Number
LMV324MT
Description
Operational Amplifier (Op-Amp) IC
Manufacturer
National Semiconductor
Datasheet

Specifications of LMV324MT

No. Of Amplifiers
1
Bandwidth
1MHz
Slew Rate
1V/µs
No. Of Pins
14
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Amplifier Type
Operational
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Application Notes
In Figure 3 , the isolation resistor R
C
margin to the overall system. The desired performance de-
pends on the value of R
value, the more stable V
waveform of Figure 3 using 620Ω for R
The circuit in Figure 5 is an improvement to the one in Figure
3 because it provides DC accuracy as well as AC stability. If
there were a load resistor in Figure 3, the output would be
voltage divided by R
Figure 5, R
forward techniques to connect V
in choosing the value of R
the LMV321/358/324. C
loss of phase margin by feeding the high frequency compo-
nent of the output signal back to the amplifier’s inverting
input, thereby preserving phase margin in the overall feed-
back loop. Increased capacitive drive is possible by increas-
ing the value of C
response.
3.0 INPUT BIAS CURRENT CANCELLATION
The LMV321/358/324 family has a bipolar input stage. The
typical input bias current of LMV321/358/324 is 15nA with 5V
supply. Thus a 100kΩ input resistor will cause 1.5mV of error
voltage. By balancing the resistor values at both inverting
and non-inverting inputs, the error caused by the amplifier’s
L
FIGURE 4. Pulse Response of the LMV324 Circuit in
FIGURE 5. Indirectly Driving A Capacitive Load with
form a pole to increase stability by adding more phase
F
provides the DC accuracy by using feed-
F
. This in turn will slow down the pulse
ISO
DC Accuracy
F
OUT
Time (2µs/div)
Figure 3
ISO
and the load resistor. Instead, in
and R
F
due to the input bias current of
. The bigger the R
will be. Figure 4 is an output
IN
ISO
(Continued)
ISO
to R
serve to counteract the
and the load capacitor
ISO
L
. Caution is needed
and 510pF for C
10006005
ISO
10006099
resistor
L.
.
14
input bias current will be reduced. The circuit in Figure 6
shows how to cancel the error caused by input bias current.
4.0 TYPICAL SINGLE-SUPPLY APPLICATION CIRCUITS
4.1 Difference Amplifier
The difference amplifier allows the subtraction of two volt-
ages or, as a special case, the cancellation of a signal
common to two inputs. It is useful as a computational ampli-
fier, in making a differential to single-ended conversion or in
rejecting a common mode signal.
4.2 Instrumentation Circuits
The input impedance of the previous difference amplifier is
set by the resistors R
problems of low input impedance, one way is to use a
voltage follower ahead of each input as shown in the follow-
ing two instrumentation amplifiers.
FIGURE 6. Cancelling the Error Caused by Input Bias
FIGURE 7. Difference Amplifier
1
, R
Current
2
, R
3
, and R
4
. To eliminate the
10006006
10006007
10006019

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