PIC18LF2410-I/ML Microchip Technology, PIC18LF2410-I/ML Datasheet - Page 137

• Manufacturer Part Number: PIC18LF2410-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.0
In PIC18F4410/4415/4510/4515/4610 devices, CCP1
is implemented as a standard CCP module with
enhanced PWM capabilities. These include the
provision for 2 or 4 output channels, user selectable
polarity, dead-band control and automatic shutdown
REGISTER 15-1:
© 2009 Microchip Technology Inc.
Note:
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
The ECCP module is implemented only in
40/44-pin devices.
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER (ECCP1 MODULE, 40/44-PIN DEVICES)
Legend:
R = Readable bit
-n = Value at POR
P1M1:P1M0: Enhanced PWM Output Configuration bits
If CCP1M3:CCP1M2 = 00, 01, 10:
xx = P1A assigned as Capture/Compare input/output; P1B, P1C, P1D assigned as port pins
If CCP1M3:CCP1M2 = 11:
00 = Single output: P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
DC1B1:DC1B0: PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are
found in CCPR1L.
CCP1M3:CCP1M0: Enhanced CCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Reserved
0010 = Compare mode, toggle output on match
0011 = Capture mode
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, initialize CCP1 pin low, set output on compare match (set CCP1IF)
1001 = Compare mode, initialize CCP1 pin high, clear output on compare match (set CCP1IF)
1010 = Compare mode, generate software interrupt only, CCP1 pin reverts to I/O state
1011 = Compare mode, trigger special event (ECCP resets TMR1 or TMR3, sets CC1IF bit)
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
bit 7
R/W-0
P1M1
as port pins
R/W-0
P1M0
DC1B1
R/W-0
W = Writable bit
‘1’ = Bit is set
DC1B0
R/W-0
and restart. The Enhanced features are discussed in
detail in Section 15.4 “Enhanced PWM Mode”.
Capture, Compare and single-output PWM functions of
the ECCP module are the same as described for the
standard CCP module.
The control register for the Enhanced CCP module is
shown in Register 15-1. It differs from the CCPxCON
registers
devices in that the two Most Significant bits are
implemented to control PWM functionality.
PIC18F2X1X/4X1X
CCP1M3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
in
PIC18F2410/2415/2510/2515/2610
CCP1M2
R/W-0
x = Bit is unknown
CCP1M1
R/W-0
DS39636D-page 139
CCP1M0
R/W-0
bit 0