PIC18LF2410-I/ML Microchip Technology, PIC18LF2410-I/ML Datasheet - Page 256

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC

PIC18LF2410-I/ML

Manufacturer Part Number
PIC18LF2410-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2410-I/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2410-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2X1X/4X1X
22.9
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming or LVP). When Single-Supply Program-
ming is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
dedicated to controlling Program mode entry and is not
available as a general purpose I/O pin.
While programming, using Single-Supply Program-
ming mode, V
as in Normal Execution mode. To enter Programming
mode, V
DS39636D-page 258
Note 1: High-voltage programming is always
PP
DD
2: By
3: When Single-Supply Programming is
4: When LVP is enabled, externally pull the
Single-Supply ICSP Programming
/RE3 pin, but the RB5/KBI1/PGM pin is then
is applied to the PGM pin.
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled in unprogrammed devices (as
supplied from Microchip) and erased
devices.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
DD
is applied to the MCLR/V
default,
SS
Single-Supply
to allow normal program
PP
ICSP
/RE3 pin
IHH
is
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RB5/KBI1/PGM then
becomes available as the digital I/O pin, RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required. If a block erase is to
be performed when using Low-Voltage Programming,
the device must be supplied with V
PP
/RE3 pin). Once LVP has been disabled, only the
DD
. If code-protected memory is to be
© 2009 Microchip Technology Inc.
IHH
applied to the MCLR/
DD
of 4.5V to 5.5V.

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