PIC18LF2410-I/ML Microchip Technology, PIC18LF2410-I/ML Datasheet - Page 369

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC

PIC18LF2410-I/ML

Manufacturer Part Number
PIC18LF2410-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2410-I/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2410-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
RCALL ............................................................................. 289
RCON Register
Reader Response ............................................................ 376
Register File ....................................................................... 65
Registers
RESET ............................................................................. 289
Reset State of Registers .................................................... 50
Resets ........................................................................ 43, 239
© 2009 Microchip Technology Inc.
Bit Status During Initialization .................................... 50
ADCON0 (A/D Control 0) ......................................... 213
ADCON1 (A/D Control 1) ......................................... 214
ADCON2 (A/D Control 2) ......................................... 215
BAUDCON (Baud Rate Control) .............................. 196
CCP1CON (Enhanced Capture/Compare/PWM
CCPxCON (Standard Capture/Compare/PWM Control)
CMCON (Comparator Control) ................................ 223
CONFIG1H (Configuration 1 High) .......................... 240
CONFIG2H (Configuration 2 High) .......................... 242
CONFIG2L (Configuration 2 Low) ............................ 241
CONFIG3H (Configuration 3 High) .......................... 243
CONFIG4L (Configuration 4 Low) ............................ 243
CONFIG5H (Configuration 5 High) .......................... 244
CONFIG5L (Configuration 5 Low) ............................ 244
CONFIG6H (Configuration 6 High) .......................... 245
CONFIG6L (Configuration 6 Low) ............................ 245
CONFIG7H (Configuration 7 High) .......................... 246
CONFIG7L (Configuration 7 Low) ............................ 246
CVRCON (Comparator Voltage Reference Control) 229
Device ID Register 1 ................................................ 247
Device ID Register 2 ................................................ 247
ECCP1AS (ECCP Auto-Shutdown Control) ............. 149
HLVDCON (HLVD Control) ...................................... 233
INTCON (Interrupt Control) ........................................ 85
INTCON2 (Interrupt Control 2) ................................... 86
INTCON3 (Interrupt Control 3) ................................... 87
IPR1 (Peripheral Interrupt Priority 1) .......................... 92
IPR2 (Peripheral Interrupt Priority 2) .......................... 93
OSCCON (Oscillator Control) .................................... 32
OSCTUNE (Oscillator Tuning) ................................... 29
PIE1 (Peripheral Interrupt Enable 1) .......................... 90
PIE2 (Peripheral Interrupt Enable 2) .......................... 91
PIR1 (Peripheral Interrupt Request (Flag) 1) ............. 88
PIR2 (Peripheral Interrupt Request (Flag) 2) ............. 89
PWM1CON (PWM Configuration) ............................ 148
RCON (Reset Control) ......................................... 44, 94
RCSTA (Receive Status and Control) ...................... 195
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 155
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ...................... 154
Status ......................................................................... 70
STKPTR (Stack Pointer) ............................................ 57
T0CON (Timer0 Control) .......................................... 115
T1CON (Timer1 Control) .......................................... 119
T2CON (Timer 2 Control) ......................................... 125
T3CON (Timer3 Control) .......................................... 127
TRISE (PORTE/PSP Control) .................................. 110
TXSTA (Transmit Status and Control) ..................... 194
WDTCON (Watchdog Timer Control) ...................... 249
Brown-out Reset (BOR) ........................................... 239
Oscillator Start-up Timer (OST) ............................... 239
Power-on Reset (POR) ............................................ 239
Control 1) ......................................................... 139
.......................................................................... 131
2
C Mode) ....................... 163
2
2
C Mode) ................. 164
C Mode) ................. 165
RETFIE ............................................................................ 290
RETLW ............................................................................ 290
RETURN .......................................................................... 291
Return Address Stack ........................................................ 56
Return Stack Pointer (STKPTR) ........................................ 57
Revision History ............................................................... 361
RLCF ............................................................................... 291
RLNCF ............................................................................. 292
RRCF ............................................................................... 292
RRNCF ............................................................................ 293
S
SCK ................................................................................. 153
SDI ................................................................................... 153
SDO ................................................................................. 153
SEC_IDLE Mode ............................................................... 40
SEC_RUN Mode ................................................................ 36
Serial Clock, SCK ............................................................ 153
Serial Data In (SDI) .......................................................... 153
Serial Data Out (SDO) ..................................................... 153
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 293
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 153
SLEEP ............................................................................. 294
Sleep
Software Simulator (MPLAB SIM) ................................... 311
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 239
Special Function Registers ................................................ 66
SPI Mode (MSSP)
SS .................................................................................... 153
SSPOV ............................................................................ 183
SSPOV Status Flag ......................................................... 183
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 58
SUBFSR .......................................................................... 305
SUBFWB ......................................................................... 294
SUBLW ............................................................................ 295
SUBULNK ........................................................................ 305
SUBWF ............................................................................ 295
SUBWFB ......................................................................... 296
SWAPF ............................................................................ 296
Power-up Timer (PWRT) ......................................... 239
OSC1 and OSC2 Pin States ...................................... 33
Map ............................................................................ 66
Associated Registers ............................................... 161
Bus Mode Compatibility ........................................... 161
Effects of a Reset .................................................... 161
Enabling SPI I/O ...................................................... 157
Master Mode ............................................................ 158
Master/Slave Connection ........................................ 157
Operation ................................................................. 156
Operation in Power Managed Modes ...................... 161
Serial Clock ............................................................. 153
Serial Data In ........................................................... 153
Serial Data Out ........................................................ 153
Slave Mode .............................................................. 159
Slave Select ............................................................. 153
Slave Select Synchronization .................................. 159
SPI Clock ................................................................. 158
Typical Connection .................................................. 157
R/W Bit ............................................................ 166, 167
PIC18F2X1X/4X1X
DS39636D-page 371

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