STM32F101VFT6 STMicroelectronics, STM32F101VFT6 Datasheet - Page 89

MCU 32BIT 768KB FLASH 100LQFP

STM32F101VFT6

Manufacturer Part Number
STM32F101VFT6
Description
MCU 32BIT 768KB FLASH 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101VFT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
STM32F101xF
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
80 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
112
Number Of Timers
15
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
STM32F101VF
Supply Current (max)
28 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-11113

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0
STM32F101xF, STM32F101xG
SPI interface characteristics
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
summarized in
Refer to
function characteristics (NSS, SCK, MOSI, MISO).
Table 53.
1. Based on characterization, not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
t
Symbol
t
t
t
h(NSS)
t
t
t
su(MI)
t
v(SO)
v(MO)
h(MO)
su(SI)
h(SO)
t
h(MI)
t
the data.
the data in Hi-Z
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(1)(2)
(1)
(1)(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Section 5.3.14: I/O port characteristics
(1)
SPI clock frequency
SPI clock rise and
fall time
NSS setup time
NSS hold time
SCK high and low
time
Data input setup
time
Data input hold time
Data output access
time
Data output disable
time
Data output valid
time
Data output valid
time
Data output hold
time
STM32F10xxx SPI characteristics
Table
Parameter
10.
Doc ID 17143 Rev 2
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Master mode, f
presc = 4
Master mode - SPI1
Master mode - SPI2
Slave mode
Master mode - SPI1
Master mode - SPI2
Slave mode
Slave mode, f
presc = 4
Slave mode, f
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
PCLKx
Conditions
PCLK
PCLK
PCLK
frequency and V
for more details on the input/output alternate
= 20 MHz
= 36 MHz,
= 36 MHz,
Table 53Table 54
DD
Electrical characteristics
supply voltage conditions
4t
Min
PCLK
73
25
50
10
3
5
4
4
6
5
0
6
are derived from tests
4t
Max
10
10
60
55
25
PCLK
8
6
89/108
MHz
Unit
ns

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