STM32F101RFT6 STMicroelectronics, STM32F101RFT6 Datasheet - Page 80

MCU 32BIT 768KB FLASH 64LQFP

STM32F101RFT6

Manufacturer Part Number
STM32F101RFT6
Description
MCU 32BIT 768KB FLASH 64LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101RFT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
STM32F101xF
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
80 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
112
Number Of Timers
15
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
STM32F101RF
Supply Current (max)
28 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-11111

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0
Electrical characteristics
5.3.14
Table 46.
1. FT = Five-volt tolerant. In order to sustain a voltage higher than V
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
3. With a minimum of 100 mV.
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
80/108
Symbol
V
R
R
C
V
V
I
disabled.
PMOS/NMOS contribution
lkg
hys
PU
PD
IH
IO
IL
Standard IO input low
level voltage
IO FT
voltage
Standard IO input high
level voltage
IO FT
voltage
Standard IO Schmitt
trigger voltage
hysteresis
IO FT Schmitt trigger
voltage hysteresis
Input leakage current
Weak pull-up equivalent
resistor
Weak pull-down
equivalent resistor
I/O pin capacitance
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
performed under the conditions summarized in
compliant.
I/O static characteristics
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in
in
(1)
(1)
Figure 41
Parameter
(5)
input low level
input high level
(2)
to the series resistance is minimum
and
(2)
(5)
(4)
Figure 42
V
V
V
DD
DD
Standard I/Os
SS
Conditions
V
V
> 2 V
V
I/O FT
IN
IN
IN
2 V
V

for 5 V tolerant I/Os.

= 5 V
IN
V
V
DD
SS
Doc ID 17143 Rev 2
V
DD
(~10% order)
0.41*(V
0.42*(V
5% V
DD
DD
Figure 39
+0.5 the internal pull-up/pull-down resistors must be
DD
–0.3
–0.3
Min
200
30
30
-2 V)+1.3 V
Table
-2 V)+1 V
DD
.
(3)
Table 46
10. All I/Os are CMOS and TTL
and
Typ
Figure 40
40
40
STM32F101xF, STM32F101xG
5
are derived from tests
0.32*(V
0.28*(V
for standard I/Os, and
V
DD
DD
DD
Max
5.5
5.2
50
50
1
-2V)+0.75 V
-2 V)+0.8 V
3
+0.3
Unit
mV
mV
µA
k
k
pF
V
V
V
V

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