SPC5604PGF0MLL6 Freescale Semiconductor, SPC5604PGF0MLL6 Datasheet - Page 13

no-image

SPC5604PGF0MLL6

Manufacturer Part Number
SPC5604PGF0MLL6
Description
IC MCU 32BIT 512KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MPC56xx Qorivvar
Datasheet

Specifications of SPC5604PGF0MLL6

Core Processor
e200z0h
Core Size
32-Bit
Speed
64MHz
Connectivity
CAN, FlexRay, LIN, SPI, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
64K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPC5604PGF0MLL6
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
SPC5604PGF0MLL6
Manufacturer:
FREESCALE
Quantity:
20 000
1.5.17.1
The BAM is a block of read-only one-time programmed memory and is identical for all MPC560xP devices that are based on
the e200z0h core. The BAM program is executed every time the device is powered on if the alternate boot mode has been
selected by the user.
The BAM provides the following features:
1.5.18
The ECSM provides a myriad of miscellaneous control functions regarding program-visible information about the platform
configuration and revision levels, a reset status register, a software watchdog timer, wakeup control for exiting sleep modes,
and information on platform memory errors reported by error-correcting codes and/or generic access error information for
certain processor cores.
The Error Correction Status Module supports a number of miscellaneous control functions for the platform. The ECSM includes
these features:
The sources of the ECC errors are:
1.5.19
The PBRIDGE implements the following features:
1.5.20
The MPC5604P MCU contains one controller area network (FlexCAN) module. This module is a communication controller
implementing the CAN protocol according to Bosch Specification version 2.0B. The CAN protocol was designed to be used
primarily as a vehicle serial data bus, meeting the specific requirements of this field: real-time processing, reliable operation in
the EMI environment of a vehicle, cost-effectiveness and required bandwidth. The FlexCAN module contains 32 message
buffers.
The FlexCAN module provides the following features:
Freescale Semiconductor
Serial bootloading via FlexCAN or LINFlex
Ability to accept a password via the used serial communication channel to grant the legitimate user access to the
non-volatile memory
Registers for capturing information on platform memory errors if error-correcting codes (ECC) are implemented
For test purposes, optional registers to specify the generation of double-bit memory errors are enabled on the
MPC5604P.
Flash memory
SRAM
Duplicated periphery
Master access privilege level per peripheral (per master: read access enable; write access enable)
Write buffering for peripherals
Checker applied on PBRIDGE output toward periphery
Byte endianess swap capability
Full implementation of the CAN protocol specification, version 2.0B
— Standard data and remote frames
— Extended data and remote frames
— Up to 8-bytes data length
— Programmable bit rate up to 1 Mbit/s
Error correction status module (ECSM)
Peripheral bridge (PBRIDGE)
Controller area network (FlexCAN)
Boot assist module (BAM)
MPC5604P Microcontroller Data Sheet, Rev. 7
13

Related parts for SPC5604PGF0MLL6