SPC5604PGF0MLL6 Freescale Semiconductor, SPC5604PGF0MLL6 Datasheet - Page 15

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SPC5604PGF0MLL6

Manufacturer Part Number
SPC5604PGF0MLL6
Description
IC MCU 32BIT 512KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MPC56xx Qorivvar
Datasheet

Specifications of SPC5604PGF0MLL6

Core Processor
e200z0h
Core Size
32-Bit
Speed
64MHz
Connectivity
CAN, FlexRay, LIN, SPI, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
64K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
Part Number:
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Part Number:
SPC5604PGF0MLL6
Manufacturer:
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Quantity:
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1.5.23
The LINFlex (local interconnect network flexible) on the MPC5604P features the following:
1.5.24
The deserial serial peripheral interface (DSPI) module provides a synchronous serial interface for communication between the
MPC5604P MCU and external devices.
The DSPI modules provide these features:
Freescale Semiconductor
Supports LIN Master mode, LIN Slave mode and UART mode
LIN state machine compliant to LIN1.3, 2.0, and 2.1 specifications
Handles LIN frame transmission and reception without CPU intervention
LIN features
— Autonomous LIN frame handling
— Message buffer to store Identifier and as much as 8 data bytes
— Supports message length as long as 64 bytes
— Detection and flagging of LIN errors (sync field, delimiter, ID parity, bit framing, checksum, and time-out)
— Classic or extended checksum calculation
— Configurable Break duration as long as 36-bit times
— Programmable baud rate prescalers (13-bit mantissa, 4-bit fractional)
— Diagnostic features: Loop back; Self Test; LIN bus stuck dominant detection
— Interrupt-driven operation with 16 interrupt sources
LIN slave mode features
— Autonomous LIN header handling
— Autonomous LIN response handling
UART mode
— Full-duplex operation
— Standard non return-to-zero (NRZ) mark/space format
— Data buffers with 4-byte receive, 4-byte transmit
— Configurable word length (8-bit or 9-bit words)
— Error detection and flagging
— Parity, Noise and Framing errors
— Interrupt-driven operation with four interrupt sources
— Separate transmitter and receiver CPU interrupt sources
— 16-bit programmable baud-rate modulus counter and 16-bit fractional
— 2 receiver wake-up methods
Full duplex, synchronous transfers
Master or slave operation
Programmable master bit rates
Programmable clock polarity and phase
End-of-transmission interrupt flag
Programmable transfer baud rate
Programmable data frames from 4 to 16 bits
Up to 20 chip select lines available
— 8 on DSPI_0
— 4 each on DSPI_1, DSPI_2 and DSPI_3
Serial communication interface module (LINFlex)
Deserial serial peripheral interface (DSPI)
MPC5604P Microcontroller Data Sheet, Rev. 7
15

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