SPC5604PGF0MLL6 Freescale Semiconductor, SPC5604PGF0MLL6 Datasheet - Page 16

• Manufacturer Part Number: SPC5604PGF0MLL6
• Description: IC MCU 32BIT 512KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MPC56xx Qorivvar

Specifications of SPC5604PGF0MLL6

• Core Processor: e200z0h
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CAN, FlexRay, LIN, SPI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 64K x 8
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.5.25
The pulse width modulator module (PWM) contains four PWM submodules, each capable of controlling a single half-bridge
power stage. There are also four fault channels.
This PWM is capable of controlling most motor types: AC induction motors (ACIM), permanent magnet AC motors (PMAC),
both brushless (BLDC) and brush DC motors (BDC), switched (SRM) and variable reluctance motors (VRM), and stepper
motors.
The FlexPWM block implements the following features:
1.5.26
The MPC5604P includes two eTimer modules. Each module provides six 16-bit general purpose up/down timer/counter units
with the following features:
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8 clock and transfer attributes registers
Chip select strobe available as alternate function on one of the chip select pins for deglitching
FIFOs for buffering as many as 5 transfers on the transmit and receive side
Queueing operation possible through use of the eDMA
General purpose I/O functionality on pins when not used for SPI
16-bit resolution for center, edge-aligned, and asymmetrical PWMs
Maximum operating clock frequency of 120 MHz
PWM outputs can operate as complementary pairs or independent channels
Can accept signed numbers for PWM generation
Independent control of both edges of each PWM output
Synchronization to external hardware or other PWM supported
Double buffered PWM registers
— Integral reload rates from 1 to 16
— Half cycle reload capability
Multiple ADC trigger events can be generated per PWM cycle via hardware
Write protection for critical registers
Fault inputs can be assigned to control multiple PWM outputs
Programmable filters for fault inputs
Independently programmable PWM output polarity
Independent top and bottom deadtime insertion
Each complementary pair can operate with its own PWM frequency and deadtime values
Individual software-control for each PWM output
All outputs can be programmed to change simultaneously via a “Force Out” event
PWMX pin can optionally output a third PWM signal from each submodule
Channels not used for PWM generation can be used for buffered output compare functions
Channels not used for PWM generation can be used for input capture functions
Enhanced dual-edge capture functionality
eDMA support with automatic reload
2 fault inputs
Capture capability for PWMA, PWMB, and PWMX channels not supported
Maximum operating clock frequency of 120 MHz
Individual channel capability
Pulse width modulator (FlexPWM)
eTimer
MPC5604P Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor