ADNK-2080 Avago Technologies US Inc., ADNK-2080 Datasheet - Page 17

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ADNK-2080

Manufacturer Part Number
ADNK-2080
Description
ADNS-2080 Sample Kit
Manufacturer
Avago Technologies US Inc.
Datasheets

Specifications of ADNK-2080

Main Purpose
Reference Design, Optical Mouse
Embedded
No
Utilized Ic / Part
ADNS-2080
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Lead Free Status / Rohs Status
 Details
Other names
516-2296

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADNK-2080
Manufacturer:
Avago Technologies US Inc.
Quantity:
135
Burst Mode Operation
Burst mode is a special serial port operation mode that
may be used to reduce the serial transaction time for a
motion read. The speed improvement is achieved by con-
tinuous data clocking to or from multiple registers with-
out the need to specify the register address, and by not
requiring the normal delay period between data bytes.
Burst mode is initiated by reading the MOTION_BURST
register (0x63). The ADNS-2080 will respond with the con-
tents of the DELTA_X, DELTA_Y, SQUAL, SHUT_HI, SHUT_LO,
and PIX_MAX and PIX_ACCUM registers in that order. The
default value in BURST_READ_FIRST register (0x42) is the
address of the DELTA_X register. The address that is speci-
fied in the BURST_READ_FIRST register can be changed
to address 0x00 – 0x02 (PROD_ID – MOTION_ST) or 0x05
– 0x08 (SQUAL – PIX_MAX). In 12-bit motion reporting
there will be an extra content in DELTA_XY_HIGH (register
0x0c), to be read out in the order of DELTA_X, DELTA_Y, 
DELTA_XY_HIGH, SQUAL, SHUT_HI, SHUT_LO, PIX_MAX
and PIX_ACCUM. The rest of the burst mode operation is
the same as 8-bit motion reporting.
The default value in BURST_LAST_READ register (0x44)
is the address of PIX_ACCUM register. This last address
setting must be larger than the first address setting,
address 0x01-0x02 (REV_ID - MOTION_ST), or  0x04 – 0x09
(DELTA_Y – PIX_ACCUM) or 0x0c (DELTA_XY_HIGH) if
12-bit motion reporting is set.
The burst read must continue until the  last specified
address in order for the IO to be back to normal mode.
After reading the MOTION_BURST address (0x63), the
microcontroller must wait t
the continuous data bytes. All data bits can be read with
no delay between bytes by driving SCLK at the normal
rate. The data are latched into the output buffer after the
last address bit is received.
17
SRAD
before starting to read
Reset
During power-up, the ADNS-2080 does not need a power
on reset as there is an internal circuitry that performs
power on reset in the sensor. However it can be reset
by writing 0x5a to register 0x3a. A full reset will thus be
executed and any register settings must be reloaded.
Power Down
The ADNS-2080 can be set to Power Down mode by writ-
ing 0x02 to register 0x0d to disable the sensor. In addition,
the SPI port should not be accessed during power down.
The table below shows the state of various pins during
power down. To exit Power Down, write 0x5a to register
0x3a to reset the sensor in order to wake it up. A full reset
will thus be executed. Wait t
SPI port. Any register settings must then be reloaded.
Notes:
*
Pin
MOTION
SCLK
SDIO
XY_LED
Reading of registers should only be performed after exiting from the
power down mode. Any read operation during power down will not
reflect the actual data of the registers.
During Power Down
Undefined
Functional*
Functional*
Low current
WAKEUP
before accessing the

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