Eval Bd - 8-channel Digital Vol Cntrl

CDB3318

Manufacturer Part NumberCDB3318
DescriptionEval Bd - 8-channel Digital Vol Cntrl
ManufacturerCirrus Logic Inc
CDB3318 datasheets
 

Specifications of CDB3318

Main PurposeAudio, Volume ControlEmbeddedNo
Utilized Ic / PartCS3318Primary Attributes8 Single-Ended Analog Inputs and Outputs, USB or RS232 Interface
Secondary AttributesGraphical User InterfaceDescription/functionAudio DSPs
Operating Supply Voltage8 V to 9 VProductAudio Modules
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantFor Use With/related ProductsCS3310
Other names598-1497  
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8-Channel Analog Volume Control
Features
Complete Analog Volume Control
8 Independently Controllable Channels
3 Configurable Master Volume and Muting
Controls
Wide Adjustable Volume Range
-96 dB to +22 dB in ¼ dB Steps
Low Distortion & Noise
-112 dB THD+N
127 dB Dynamic Range
Noise-Free Level Transitions
Zero-Crossing Detection with
Programmable Time-Out
Low Channel-to-Channel Crosstalk
120 dB Inter-Channel Isolation
Comprehensive Serial Control Port
®
Supports I²C
and SPI
Independent Control of up to 128 Devices
on a Shared 2-Wire I²C or 3-Wire SPI
Control Bus
Supports Individual and Grouped Control of
all CS3318 Devices on the I²C or SPI
Control Bus
Flexible Power Supply Voltages
±8 V to ±9 V Analog Supply
+3.3 V Digital Supply
±8 V to ±9 V
8-Channel
8
Analog
Inputs
+3.3 V
I²C / SPI
I²C/SPI
Control
Serial
Port
Control
http://www.cirrus.com
Description
The CS3318 is an 8-channel digitally controlled analog
volume control designed specifically for high-end audio
systems. It features a comprehensive I²C/SPI serial
control port for easy device and volume configuration.
The CS3318 includes arrays of well-matched resistors
and complementary low-noise active output stages. A
total adjustable range of 118 dB, in ¼ dB steps, is
spread evenly over 96 dB of attenuation and 22 dB of
gain.
The CS3318 implements configurable zero-crossing
detection to provide glitch-free volume-level changes.
The I²C/SPI control interface provides for easy system
integration of up to 128 CS3318 devices over a single 2-
wire I²C or 3-wire SPI bus, allowing many channels of
volume control with minimal system controller I/O re-
quirements. Devices may be controlled on an individual
and grouped basis, simplifying simultaneous configura-
TM
Communication
tion of a group of channels across multiple devices,
while allowing discrete control over all channels on an
individual basis.
The device operates from ±8 V to ±9 V analog supplies
and has an input/output voltage range of ±6.65 V to
±7.65 V. The digital control interface operates at +3.3 V.
The CS3318 is available in a 48-pin LQFP package in
Commercial grade (-10° to 70° C). The CS3318 Cus-
tomer Demonstration board is also available for device
evaluation. Refer to
for complete details.
Zero Crossing
Detector
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
CS3318
“Ordering Information” on page 44
+
8
_
DECEMBER '06
8-Channel
Analog
Outputs
DS693F1

CDB3318 Summary of contents

  • Page 1

    Analog Volume Control Features Complete Analog Volume Control – 8 Independently Controllable Channels – 3 Configurable Master Volume and Muting Controls Wide Adjustable Volume Range – ¼ dB Steps Low Distortion & Noise ...

  • Page 2

    TABLE OF CONTENTS 1. PIN DESCRIPTIONS ............................................................................................................................ 5 2. CHARACTERISTICS AND SPECIFICATIONS .................................................................................... 7 SPECIFIED OPERATING CONDITIONS .................................................................................................... 7 ABSOLUTE MAXIMUM RATINGS............................................................................................................... 7 ANALOG CHARACTERISTICS ................................................................................................................... 8 DIGITAL INTERFACE CHARACTERISTICS............................................................................................... 9 MUTE SWITCHING CHARACTERISTICS .................................................................................................. 9 CONTROL PORT SWITCHING CHARACTERISTICS ...

  • Page 3

    MUTE Input Polarity (Bit 4) ................................................................................................ 33 7.4.3 Channel B = Channel A (Bit ..................................................................................... 34 7.5 Device Configuration 2 - Address 0Ch ........................................................................................ 34 7.5.1 Zero-Crossing Time-Out Period (Bits 4:2) ......................................................................... 34 7.5.2 Zero-Crossing Mode ...

  • Page 4

    LIST OF FIGURES Figure 1.Control Port Timing - I²C Format.................................................................................................. 10 Figure 2.Control Port Timing - SPI Format................................................................................................. 11 Figure 3.Typical Connection Diagram........................................................................................................ 12 Figure 4.Detailed Block Diagram ............................................................................................................... 13 Figure 5.CS3318 Control Mapping Matrix.................................................................................................. 17 Figure 6.Volume & Muting ...

  • Page 5

    PIN DESCRIPTIONS IN1 1 REFI1 2 RESET 3 MUTE 4 SCL/CCLK 5 SDA/MOSI 6 AD0/CS 7 ENOut 8 DGND REFI8 11 IN8 12 Pin Name # Pin Description IN1 1 IN2 42 IN3 39 IN4 32 ...

  • Page 6

    Pin Name # Pin Description OUT1 47 OUT2 44 OUT3 37 OUT4 34 Analog Outputs (Output) - The full-scale output level is specified in the Analog Characteristics specifi- cation table. OUT5 27 OUT6 24 OUT7 17 OUT8 14 REFI1 2 ...

  • Page 7

    CHARACTERISTICS AND SPECIFICATIONS All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltages and T = 25°C. A SPECIFIED OPERATING CONDITIONS (DGND = ...

  • Page 8

    ANALOG CHARACTERISTICS (Test conditions (unless otherwise specified): R Bandwidth) Parameter DC Characteristics Step Size Gain Error Gain Matching Between Channels Input Resistance Input Capacitance AC Characteristics Total Harmonic Distortion + Noise Dynamic Range Input/Output Voltage Range Output Noise Interchannel Isolation ...

  • Page 9

    DIGITAL INTERFACE CHARACTERISTICS Parameters High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage Low-Level Output Voltage Input Leakage Current Input Capacitance MUTE SWITCHING CHARACTERISTICS (Inputs: Logic 0 = DGND, Logic ...

  • Page 10

    CONTROL PORT SWITCHING CHARACTERISTICS - I²C FORMAT (Inputs: Logic 0 = DGND, Logic 1 = VD, C Parameter SCL Clock Frequency RESET Rising Edge to Start Bus Free Time Between Transmissions Start Condition Hold Time (prior to first clock pulse) ...

  • Page 11

    CONTROL PORT SWITCHING CHARACTERISTICS - SPI™ FORMAT (Inputs: Logic 0 = DGND, Logic 1 = VD, C Parameter CCLK Clock Frequency RESET Rising Edge to CS Falling CS High Time Between Transmissions CS Falling to CCLK Edge CCLK Low Time ...

  • Page 12

    TYPICAL CONNECTION DIAGRAM + + -9V Audio Source See Note +3 kΩ Host Controller + + -9V Note: Resistors are required for I²C control port operation. 12 ...

  • Page 13

    DETAILED BLOCK DIAGRAM IN1 1 VA+ 45 VA- 46 REFI1 2 IN2 42 REFI2 41 IN3 39 VA+ 35 VA- 36 REFI3 40 IN4 32 REFI4 31 RESET 3 SDA/MOSI 6 SCL/CLLK 5 AD0/CS 7 MUTE 4 IN5 29 ...

  • Page 14

    APPLICATIONS 5.1 General Description The CS3318 is an 8-channel digitally controlled analog volume control designed for audio systems. It incor- porates a total adjustable range of 118 dB in ¼ dB steps, spread evenly over attenuation ...

  • Page 15

    Analog Outputs The analog outputs are capable of driving short-circuit protected to The minimum output load resistance is As the load resistance decreases, the potential for increased internal heating and the possibility of dam- age to the device is ...

  • Page 16

    Recommended Power-Up Sequence 1. Hold RESET low until the power supplies are stable. In this state, the control port is reset to its default settings. 2. Bring RESET high. The device will remain in a low power state with ...

  • Page 17

    Volume & Muting Control Architecture The CS3318’s volume and muting control architecture provides the ability to control each channel on an individual and master basis. Individual control allows the volume and mute state of a single channel to be ...

  • Page 18

    Combining the multiple group addressing capabilities of the CS3318 (as detailed in page 24) with the internal master control mapping abilities described above allows the configuration and direct addressing of multiple logical groups of channels across multiple CS3318 devices within ...

  • Page 19

    Volume Controls The CS3318 provides comprehensive volume control functionality, allowing each channel’s volume to be changed on an individual or master basis. Refer to the page 17 for complete details about the configuration of the CS3318’s individual and master ...

  • Page 20

    Table 1 shows example volume settings using individual and master volume controls. Individual ChX Channel 1 +3.75 dB Channel 2 +2.5 dB Channel 3 +1.25 dB Channel Channel 5 -1.25 dB Channel 6 -2.5 dB Channel 7 ...

  • Page 21

    Muting Controls The CS3318 provides flexible muting capabilities to complement its comprehensive volume control abilities. Each channel’s mute state may be controlled on an individual channel basis, by any of 3 master mute con- trols, and by the hardware ...

  • Page 22

    Zero-Crossing Detection The CS3318 incorporates comprehensive zero-crossing detection features to provide for noise-free level transitions. Three zero-crossing detection modes and 8 selectable time-out periods are available for en- hanced flexibility. Zero-crossing detection and time-out is implemented independently for each ...

  • Page 23

    System Serial Control Configuration The CS3318 includes a comprehensive serial control port which supports both SPI and I²C modes of com- munication (See the “I²C/SPI Serial Control Formats” section on page serial control bus to define each device’s slave ...

  • Page 24

    Serial Control within a Multiple-CS3318 System The CS3318 allows both independent and simultaneous control 128 devices on a shared I²C or SPI serial control bus. The address of each device is configured by the host controller ...

  • Page 25

    N+1 may be repeated for up to 128 devices per single CS signal. If more than 128 devices are required in a system, separate CS signals may be used to create additional chains 128 ...

  • Page 26

    Once this configuration process is complete, every device may be independently controlled with a standard SPI communication cycle using the device’s newly assigned Individual device addresses. 5.8.2.2 I²C Mode Control Configuration Up to 128 CS3318’s may be connected to a ...

  • Page 27

    I²C/SPI Serial Control Formats The control port is used to access the internal registers of the CS3318 and I²C, with the CS3318 acting as a slave device. SPI Mode is selected if there is a high-to-low transition on the ...

  • Page 28

    SCL CHIP ADDRESS (WRITE) SDA MSB Chip Address LSB START Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown in Figure 13, the ...

  • Page 29

    CS3318 REGISTER QUICK REFERENCE This table shows the register names and their associated default values. Addr Function 7 01h Ch. 1 Volume Vol7 page 31 1 02h Ch. 2 Volume Vol7 page 31 1 03h Ch. 3 Volume Vol7 ...

  • Page 30

    Addr Function 7 10h Master 1 Mask M1_Ch8M M1_Ch7M M1_Ch6M page 36 1 11h Master 1 Vol- M1_Vol7 ume page 36 1 12h Master 1 Con- Reserved trol page 37 0 13h Master 2 Mask M2_Ch8M M2_Ch7M M2_Ch6M page 37 ...

  • Page 31

    CS3318 REGISTER DESCRIPTIONS Notes: 1. When addressing the CS3318 with the Individual Chip Address, all registers are read/write in I²C Mode and write-only in SPI Mode, unless otherwise noted. 2. When addressing the CS3318 with the Group Chip Addresses, ...

  • Page 32

    Control - Address 09h 7 6 Quarter8 Quarter7 Quarter6 7.2.1 ¼ dB Control (Bit Default = 0 Function: When set, ¼ gain will be added to each bit’s respective channel. The volume ...

  • Page 33

    Mute Control - Address 0Ah 7 6 MuteCh8 MuteCh7 MuteCh6 7.3.1 Mute Channel X (Bit Default = 0 Function: Each bit controls the individual mute state of its respective channel. When set, the mute condition is ...

  • Page 34

    Channel B = Channel A (Bit Default = 0 Function: When this bit is set, Channel A and Channel B volume levels and muting conditions are controlled by the Channel A volume and muting register settings, ...

  • Page 35

    Zero-Crossing Mode (Bits 1:0) Default = 01 Function: These bits control the Zero-Crossing detection mode as shown in ing Modes” section on page 22 ZCMode[1:0] 00 Volume changes take effect immediately. 01 Volume changes take effect on a signal ...

  • Page 36

    Freeze Control - Address 0Fh 7 6 Reserved Reserved Reserved 7.8.1 Freeze (Bit 7) Default = 0 Function: When the Freeze bit is set, the Freeze function allows modifications to the control port registers with- out changes taking effect ...

  • Page 37

    Master 1 Control - Address 12h 7 6 Reserved Reserved Reserved 7.11.1 Master 1 Mute (Bit 1) Default = 0 Function: This bit controls the Master 1 mute state. When set, the Master 1 mute condition is active. When ...

  • Page 38

    In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB resolution volume setting down to ½ dB resolution. It should be noted that input values outside the CS3318’s analog range of +22 dB ...

  • Page 39

    ZCMode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see Configuration 2 - Address 0Ch” on page The value of the Master 3 volume control register is mapped to the desired 0.5 dB step Master ...

  • Page 40

    Group 2 Chip Address 19h 7 6 G2_Addr6 G2_Addr5 G2_Addr4 7.18.1 Group 2 Chip Address (Bits 7:1) SPI Mode Default = 1000000b I²C Mode Default = See Function: These bits set the Group 2 chip address, and may be ...

  • Page 41

    Individual Chip Address 1Bh 7 6 Ind_Addr6 Ind_Addr5 Ind_Addr4 7.20.1 Individual Chip Address (Bits 7:1) SPI Mode Default = 1000000b I²C Mode Default = See Function: These bits set the individual chip address, and may be modified at any ...

  • Page 42

    PARAMETER DEFINITIONS Dynamic Range Full-scale (RMS) signal to broadband noise ratio. The broadband noise is measured over the specified bandwidth with the input grounded. Expressed in decibels. Total Harmonic Distortion + Noise The ratio of the rms value of ...

  • Page 43

    PACKAGE DIMENSIONS 48L LQFP PACKAGE DRAWING D1 D DIM MIN A --- A1 0.002 B 0.007 D 0.343 D1 0.272 E 0.343 E1 0.272 e* 0.016 L 0.018 ∝ 0.000° * Nominal pin pitch is 0.50 mm 10.THERMAL CHARACTERISTICS ...

  • Page 44

    ... Analog Characteristics L Analog Characteristics Analog Characteristics Analog Characteristics Analog Characteristics page www.cirrus.com. CS3318 Temp Range Container Order # Tray CS3318-CQZ Tape & Reel CS3318-CQZR - - CDB3318 table on page 8. table on page 8 table on page 8. table on page 8. Analog Characteristics table on page table on page 8. ...