VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet

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VS6624Q0KP

Manufacturer Part Number
VS6624Q0KP
Description
Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
Manufacturer
STMicroelectronics
Datasheet

Specifications of VS6624Q0KP

Description/function
Camera Module
Interface Type
Two-Wire Serial
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
VS6624Q0KP/TR
Manufacturer:
ST
0
Features
April 2010
1280H x 1024V active pixels
3.0 µm pixel size, 1/3 inch optical format
RGB Bayer color filter array
Integrated 10-bit ADC
Integrated digital image processing functions,
including defect correction, lens shading
correction, image scaling, demosaicing,
sharpening, gamma correction and color space
conversion
Embedded camera controller for automatic
exposure control, automatic white balance
control, black level compensation, 50/60 Hz
flicker cancelling and flashgun support
Fully programmable frame rate and output
derating functions
Up to 15 fps SXGA progressive scan
Low power 30 fps VGA progressive scan
ITU-R BT.656-4 YUV (YCbCr) 4:2:2 with
embedded syncs, YUV (YCbCr) 4:0:0, RGB
565, RGB 444, Bayer 10-bit or Bayer 8-bit
output formats
8-bit parallel video interface, horizontal and
vertical syncs, 54MHz (max) clock
Two-wire serial control interface
On-chip PLL, 6.5 to 54 MHz clock input
Analog power supply, from 2.4 to 3.0 V
Separate I/O power supply, 1.8 or 2.8 V levels
Integrated power management with power
switch, automatic power-on reset and power-
safe pins
Low power consumption, ultra low standby
current
Triple-element plastic lens, F# 3.2, 52°
Horizontal field of view (VS6624)
8.0 x 8.0 x 6.1mm fixed focus camera module
with embedded passives (VS6624)
1.3 Megapixel single-chip camera module
Rev 8
Applications
Description
The VL6624/VS6624 is an SXGA CMOS color
digital camera featuring low size and low power
consumption targeting mobile applications. This
complete camera module is ready to connect to
camera enabled baseband processors, back-end
IC devices or PDA engines.
20-wire FPC attachment with board-to-board
connector, 22 mm total length, for mobile
application only
24-pin (ITU) shielded socket options
Mobile phone
Videophone
Medical
Machine vision
Toys
PDA
Biometry
Bar code reader
Lighting control
VS6624
VL6624
www.st.com
1/106
1

Related parts for VS6624Q0KP

VS6624Q0KP Summary of contents

Page 1

Features ■ 1280H x 1024V active pixels ■ 3.0 µm pixel size, 1/3 inch optical format ■ RGB Bayer color filter array ■ Integrated 10-bit ADC ■ Integrated digital image processing functions, including defect correction, lens shading correction, image scaling, ...

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Contents Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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VL6624/VS6624 Manipulation of RGB data ...

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Contents 11 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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VL6624/VS6624 List of tables Table 1. VS6624 signal description of 20-pin flex connector . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables Table 51. Parallel data interface timings ...

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... SDA/SCL rise and fall times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Figure 36. Parallel data output video timing Figure 37. Package outline socket module VS6624Q0KP Figure 38. Package outline socket module VS6624Q0KP Figure 39. Package outline FPC module VS6624P0LP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Figure 40. Package outline FPC module VS6624P0LP 100 Figure 41. VL6524QOMH outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 ...

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Overview 1 Overview The VL6624/VS6624 is a SXGA resolution CMOS imaging device designed for low power systems. Manufactured using ST 0.18 µm CMOS Imaging process, it integrates a high-sensitivity pixel array, a digital image processor and camera control functions. The ...

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VL6624/VS6624 2 Electrical interface The VL6624/VS6624 FPC board to board connector has 20 electrical connections which are listed in Table 1 . the package details of the flex connector are shown in and Figure 40 . Table 1. VS6624 signal ...

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System architecture 3 System architecture The VS6624 consists of the following main blocks: ● SXGA-sized pixel array ● Video timing generator ● Video pipe ● Statistics gathering unit ● Clock generator ● Microprocessor A simplified block diagram is shown VL6624/VS6624 ...

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... At this point an anti-alias filter is applied. Anti-Zipper pixel frequency. To remove this artefact an anti-zipper filter is employed. Sharpening order to compensate for the low-pass filtering effects of the previous modules. Gamma is user adjustable. This function is used to apply gain and offset to data coming from the ...

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... The microprocessor inside the VL6624/VS6624 performs the following tasks: Host communication handles the I²C communication with the host processor. Video pipe configuration configures the video pipe modules to produce the output required by the host. Automatic exposure control In normal operation the VL6624/VS6624 determines the appropriate exposure settings for a particular scene and outputs correctly exposed images ...

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VL6624/VS6624 4 Operational modes VL6624/VS6624 has a number of operational modes. The power down mode is entered and exited by driving the hardware CE signal. Transitions between all other modes are initiated by I²C transactions from the host system or ...

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Operational modes During the power-up sequence (CE = logic 1) ● The digital supplies must be on and stable. ● The internal digital supply of the VL6624/VS6624 is enabled by an internal switch mechanism. ● All internal registers are reset ...

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VL6624/VS6624 Pause mode are accessible but no data is output from the device. The device is ready to start streaming but is halted. This mode is used to set up the required output format before outputting any data. The analogue ...

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Operational modes 4.2 Mode transitions Transitions between operating modes are normally controlled by the host by writing to the Host interface manager control time out. If there is no activity in the Pause state then an automatic transition to the ...

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VL6624/VS6624 5 Clock control Input clock The VS6624 requires provision of an external reference clock. The external clock should coupled square wave. The clock signal may have been RC filtered. The clock input is fail-safe in power ...

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Frame control 6 Frame control Sensor mode control The VS6624 device can operate it’s sensor array in three modes controlled by register SensorMode within ● SensorMode_SXGA - the full array is readout and the max frame rate achievable is 15fps ...

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VL6624/VS6624 Figure 4. Crop controls uwManualCropVerticalStart Sensor array vertical size Zoom It is possible to zoom between the sensor size selected and the output size (if the output size selected equals the sensor mode size then no zoom can take ...

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Frame control Horizontal mirror and vertical flip The image data output from the VL6624/VS6624 can be mirrored horizontally or flipped vertically (or both). Video pipe setup The VS6624 has a single video pipe, the control of this pipe can be ...

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VL6624/VS6624 ViewLive Operation ViewLive is an option which allows a different pipe setup bank to be applied to alternate frames of the output data. The controls for VIewLive function are found in the register bank where the fEnable register allows ...

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Output data formats 7 Output data formats The VL6624/VS6624 supports the following data formats: ● YUV4:2:2 ● YUV4:0:0 ● RGB565 ● RGB444 (encapsulated as 565) ● RGB444 (zero padded) ● Bayer 10-bit ● Bayer 8-bit The required data format is ...

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VL6624/VS6624 Figure data swapping options register 0x2294 bYuvSetup DEFAULT YUV 4:0:0 The ITU protocol allows the encapsulation of various data formats over the link. The following data formats are also proposed encapsulated in ITU601-656 protocol: ● ...

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Output data formats RGB and Bayer 10 bit data formats The VL6624/VS6624 can output data in the following formats: ● RGB565 ● RGB444 (encapsulated as RGB565) ● RGB444 (zero padded) ● Bayer 10-bit Note: Pixels in Bayer 10-bit data output ...

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VL6624/VS6624 Manipulation of RGB data It is possible to modify the encapsulation of the RGB data in a number of ways: ● swap the location of the RED and BLUE data ● reverse the bit order of the individual color ...

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Data synchronization methods 8 Data synchronization methods External capture systems can synchronize with the data output from VL6624/VS6624 in one of two ways: 1. Synchronization codes are embedded in the output data 2. Via the use of two additional synchronization ...

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VL6624/VS6624 Figure 11. ITU656 frame structure with even codes SAV 80 SAV AB The synchronization codes for odd and even frames are listed in default all frames output from the VL6624/VS6624 are EVEN possible to set all frames ...

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Data synchronization methods Mode 2 The structure of a mode 2 image frame is shown Figure 12. Mode 2 frame structure (VGA example For mode 2, the synchronization codes are as listed in Table 5. Mode 2 - ...

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VL6624/VS6624 Mode 2 Logical DMA channels The purpose of logical channels is to separate different data flows which are interleaved in the data stream, in the case of the VS6624 this allows the identification of the pipe setup bank used ...

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Data synchronization methods In automatic mode the HSYNC signal envelops all the active video data on every line in the output frame regardless of the programmed image size. Line codes (if selected) fall outside the HSYNC envelope as shown in ...

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VL6624/VS6624 Figure 15. VSYNC timing example If manual mode is selected then the line number for VSYNC rising edge and falling edge is programmable. The rising edge of VSYNC is programmed in the bVsyncRisingLine registers, the pixel position for VSYNC ...

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Data synchronization methods Figure 16. QCLK options data Negative edge Positive edge PCLK Negative edge Positive edge The YUV, RGB and bayer timings are represented on qualifying pclk clock. The output clock rate is effectively halved for the bayer 8-bit ...

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VL6624/VS6624 Master / Slave operation of PLCK In normal operation VS6624 acts as a master. PCLK is independent of the input clock frequency and does not have a determined phase relation to the input clock. In SLAVE operation the input ...

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Getting started 9 Getting started Initial power up Before any communication is possible with the VL6624/VS6624 the following steps must take place: 1. Apply VDD (1.8V or 2.8V) 2. Apply AVDD (2.8V) 3. Apply an external CLOCK (6.5MHz to 54MHz) ...

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VL6624/VS6624 10 Host communication - I²C control interface The interface used on the VL6624/VS6624 is a subset of the I²C standard. Higher level protocol adaptations have been made to allow for greater addressing flexibility. This extended interface is known as ...

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Host communication - I²C control interface read. A read message is terminated by the bus master generating a negative acknowledge after reading a final byte of data. A message can only be terminated by the bus master, either by issuing ...

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VL6624/VS6624 1. Master generates a START condition to signal the start of new message. 2. Master outputs, MS bit first, a 7-bit device address of the slave the master is trying to communicate with followed by a R/W bit. a) ...

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Host communication - I²C control interface 10.3 Data valid The data on SDA is stable during the high period of SCL. The state of SDA is changed during the low phase of SCL. The only exceptions to this are the ...

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VL6624/VS6624 10.5 Acknowledge After every byte transferred the receiver must output an acknowledge bit. To acknowledge the data byte receiver pulls SDA during the 9th SCL clock cycle generated by the master. If SDA is not pulled low then the ...

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Host communication - I²C control interface Figure 25. Internal register index space 16-bit Index / 8-bit Data Format 64k by 8-bit wide index space (Valid Addresses 0-65535) 10.7 Types of messages This section gives guidelines on the basic operations to ...

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VL6624/VS6624 10.8 Random location, single data write For the master writing to the slave the R/W bit is set to zero. The register index value written is preserved and is used by a subsequent read. The write message is terminated ...

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Host communication - I²C control interface 10.10 Random location, single data read When a location read, but the value of the stored index is not known, a write message with no data byte must be written first, ...

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VL6624/VS6624 10.12 Multiple location read stating from the current location In the same manner to multiple location writes, multiple locations can be read with a single read message. Figure 30. Multiple location read 16-bit Index, 8-bit data multiple location read ...

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Host communication - I²C control interface 10.13 Multiple location read starting from a random location Figure 31. Multiple location read starting from a random location 44/106 VL6624/VS6624 ...

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VL6624/VS6624 11 Register map The VL6624/VS6624 I²C write address is 0x20. To read or write to registers other than those in must be switched on, this is done by writing 0x02 to 0xC003. Information on initial power up for the ...

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Register map Example Convert -0.41 to Float 900 Convert the fraction into binary by successive multiplication by 2 and removal of integer component This gives us -0.0110100011110. We then normalize by moving the decimal point to give - 1.10100011110 * ...

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VL6624/VS6624 Low level control registers Table 7. Low-level control registers Index MicroEnable Default value Purpose 0xC003 Type Possible values DIO_Enable Default value Purpose 0xC044 Type Possible values 1. Can be controlled in all stable states. Note: The default values for ...

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Register map User interface map Device parameters [read only] Table 8. Device parameters [read only] Index uwDeviceId 0x0001 (MSByte) Purpose 0x0002 (LSByte) Type bFirmwareVsnMajor 0x0004 Type bFirmwareVsnMinor 0x0006 Type bPatchVsnMajor 0x0008 Type bPatchVsnMinor 0x000a Type 1. Can be accessed in ...

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VL6624/VS6624 Host interface manager status Table 10. Host interface manager status [Read only] Index bState Default Value Purpose Type 0x0202 Possible values 1. Can be accessed in all stable states Run mode control Table 11. Run mode control Index fMeteringOn ...

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Register map Mode setup Table 12. Mode setup Index bNonViewLive_ActivePipeSetupBank (Can be controlled in all stable states) Default Value: Purpose 0x0302 Type Possible values SensorMode (Must be configured in STOP mode) Default value Purpose 0x0308 Type Possible values Pipe setup ...

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VL6624/VS6624 Table 13. Pipe setup bank0 Index uwManualVSize0 # 0x0387(MSB) Default value 0x0388(LSB) Purpose Type uwZoomStepHSize0 0x038b(MSB) Default value 0x038c(LSB) Purpose Type uwZoomStepVSize0 0x038f(MSB) Default value 0x0390(LSB) Purpose Type bZoomControl0 Default value Purpose 0x0392 Type Possible values uwPanSteplHSize0 0x0395(MSB) Default ...

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Register map Table 13. Pipe setup bank0 Index bPanControl0 Default value Purpose Type 0x039c Possible values bCropControl0 Default value Purpose 0x039e Type Possible values uwManualCropHorizontalStart0 0x03a1(MSB) Default value 0x03a2(LSB) Purpose Type uwManualCropHorizontalSize0 0x03a5(MSB) Default value 0x03a6(LSB) Purpose Type uwManualCropVerticalStart0 0x03a9(MSB) ...

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VL6624/VS6624 Table 13. Pipe setup bank0 Index bImageFormat0 # Default value Purpose Type 0x03b0 Possible values bBayerOutputAlignment0 Default value Purpose 0x03b2 Type Possible values bContrast0 Default value 0x03b4 Purpose Type bColourSaturation0 Default value 0x03b6 Purpose Type bGamma0 Default value 0x03b8 ...

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Register map Table 13. Pipe setup bank0 Index fHorizontalMirror0 Default Value: Purpose 0x03ba Type Possible values fVerticalFlip0 Default Value: Purpose 0x03bc Type Possible values bChannelD Default value 0x03be Purpose Type Possible values 1. Can be controlled in all stable state. ...

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VL6624/VS6624 Pipe setup bank1 Table 14. Pipe setup bank1 Index bImageSize1 # Default value Purpose Type 0x0400 Possible values uwManualHSize1 # 0x0403(MSB) Default value 0x0404(LSB) Purpose Type uwManualVSize1 # 0x0407(MSB) Default value 0x0408(LSB) Purpose Type uwZoomStepHSize1 0x040b(MSB) Default value 0x040c(LSB) ...

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Register map Table 14. Pipe setup bank1 Index bZoomControl1 Default value Purpose 0x0412 Type Possible values uwPanSteplHSize1 0x0415(MSB) Default value 0x0416(LSB) Purpose Type uwPanStepVSize1 0x0419(MSB) Default value 0x041a(LSB) Purpose Type bPanControl1 Default value Purpose Type 0x041c Possible values bCropControl1 Default ...

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VL6624/VS6624 Table 14. Pipe setup bank1 Index uwManualCropHorizontalSize1 0x0425(MSB) Default value 0x0426(LSB) Purpose Type uwManualCropVerticalStart1 0x0429(MSB) Default value 0x042a(LSB) Purpose Type uwManualCropVerticalSize1 0x042d(MSB) Default value 0x042e(LSB) Purpose Type bImageFormat1 Default value Purpose Type 0x0430 Possible values bBayerOutputAlignment1 Default value Purpose ...

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Register map Table 14. Pipe setup bank1 Index bContrast1 Default value 0x0434 Purpose Type bColourSaturation1 Default value 0x0436 Purpose Type bGamma1 Default value 0x0438 Purpose Type Possible values fHorizontalMirror1 Default value Purpose 0x043a Type Possible values fVerticalFlip1 Default value Purpose ...

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VL6624/VS6624 Viewlive control Table 15. ViewLive control Index fEnable (Can be controlled in all stable states) Default value Purpose 0x0480 Type Possible values bInitialPipeSetupBank (must be setup in PAUSE or STOP mode) Default value Purpose 0x0482 Type Possible values Viewlive ...

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Register map Power management Table 17. Power management Index 0x0580 bTimeToPowerdown Default value Purpose Type 1. Must be configured in STOP mode Video timing parameter host inputs Table 18. Video timing parameter host inputs Index uwExternalClockFrequencyMhzNumerator Default value 0x0605 (MSByte) ...

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VL6624/VS6624 Frame dimension parameter host inputs Table 20. Frame dimension parameter host inputs Index bLightingFrequencyHz Default value 0x0c80 Purpose Type fFlickerCompatibleFrameLength Default value Purpose 0x0c82 Type Possible values 1. Can be controlled in all stable states Static frame rate control ...

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Register map Automatic Frame rate control Table 22. Automatic Frame Rate Control Index bDisableFrameRateDamper Default value Purpose 0x0e80 Type Possible values bMinimumDamperOutput 0x0e8c (MSByte) Default value 0x0e8a (LSByte) Purpose Type 1. Can be controlled in all stable states Exposure controls ...

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VL6624/VS6624 Table 23. Exposure controls Index bMetering Default value Purpose 0x1182 Type possible values bManualExposureTime_Num Default value 0x1184 Purpose Type bManualExposureTime_Den 0x1186 Default value Type fpManualFloatExposureTime 0x1189 (MSByte) Default value 0x118a (LSByte) Purpose Type iExposureCompensation Default value 0x1190 Purpose Type ...

Page 64

Register map Table 23. Exposure controls Index uwDirectModeFineIntegrationPixels 0x1199 (MSByte) Default value 0x119a (LSByte) Purpose Type fpDirectModeAnalogGain 0x119d (MSByte) Default value 0x119e (LSByte) Purpose Type fpDirectModeDigitalGain 0x11a1 (MSByte) Default value 0x11a2 (LSByte) Purpose Type uwFlashGunModeCoarseIntLines 0x11a5 (MSByte) Default value 0x11a6 ...

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VL6624/VS6624 Table 23. Exposure controls Index fFreezeAutoExposure Default value Purpose 0x11b4 Type possible values fpUserMaximumIntegrationTime Default value 0x11b7 (MSByte) 0x11b8 (LSByte) Purpose Type 0x11bb (MSByte) Default value 0x11bc (LSByte) Purpose Type Default value Purpose 0x11c0 Type Possible values 1. Can ...

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Register map White balance control Table 24. White balance control parameters Index bMode Default value Purpose Type 0x1480 possible values bManualRedGain Default value 0x1482 Purpose Type bManualGreenGain Default value 0x1484 Purpose Type bManualBlueGain Default value 0x1486 Purpose Type fpFlashRedGain 0x148b ...

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VL6624/VS6624 Table 24. White balance control parameters Index fpFlashBlueGain 0x1493 (MSByte) Default value 0x1494 (LSByte) Purpose Type 1. Can be controlled in all stable states Sensor setup Table 25. Sensor setup Index bBlackCorrectionOffset Default value 0x1990 Purpose Type 1. Can ...

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Register map Table 26. Image stability [read only] Index fStable Default value Purpose 0x1906 Type Possible values Flash control Table 27. Flash control Index bFlashMode Default value Purpose 0x1a80 Type Possible values uwFlashOffLine 0x1a83(MSB) Default value 0x1a84(LSB) Purpose Type 1. ...

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VL6624/VS6624 Flash status [read only] Table 28. Flash status Index fFlashRecommend Default value 0x1b00 Purpose Type Possible values fFlashGrabComplete Default value 0x1b02 Purpose Type Possible values Scythe filter controls Table 29. Scythe filter controls Index fDisableFilter Default value Purpose 0x1d80 ...

Page 70

Register map Demosaic control Table 31. Demosaic control Index bAntiAliasFilterSuppress Default value 0x1e80 Purpose Type 1. Can be controlled in all stable state Colour matrix dampers Table 32. Colour matrix dampers Index fDisable Default value Purpose 0x1f00 Type Possible values ...

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VL6624/VS6624 Peaking control Table 33. Peaking control Index bUserPeakGain Default value 0x2000 Purpose Type fDisableGainDamping Default value Purpose 0x2002 Type Possible values fpDamperLowThreshold_Gain 0x2005 (MSByte) Default value 0x2006 (LSByte) Purpose Type fpDamperHighThreshold_Gain 0x2009 (MSByte) Default value 0x200a (LSByte) Purpose Type ...

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Register map Table 33. Peaking control Index bUserPeakHiThresh Default value 0x2014 Purpose Type fpDamperLowThreshold_Coring 0x2017 (MSByte) Default value 0x2018 (LSByte) Purpose Type fpDamperHighThreshold_Coring 0x201b (MSByte) Default value 0x201c (LSByte) Purpose Type fpMinimumDamperOutput_Coring 0x201f (MSByte) Default value 0x2020 (LSByte) Purpose Type ...

Page 73

VL6624/VS6624 Pipe 0 RGB to YUV matrix manual control Table 34. Pipe0 RGB to YUV matrix manual control Index fRgbToYuvManuCtrl Default value Purpose 0x2180 Type Possible values w0_0 0x2183 (MSByte) Default value 0x2184(LSByte) Purpose Type w0_1 0x2187 (MSByte) Default value ...

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Register map Table 34. Pipe0 RGB to YUV matrix manual control Index w2_0 0x219b (MSByte) Default value 0x219c (LSByte) Purpose Type w2_1 0x21a0 (MSByte) Default value 0x219f (LSByte) Purpose Type w2_2 0x21a3 (MSByte) Default value 0x21a4 (LSByte) Purpose Type YinY ...

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VL6624/VS6624 Pipe 1 RGB to YUV matrix manual control Table 35. Pipe1 RGB To YUV matrix manual control Index fRgbToYuvManuCtrl Default value Purpose 0x2200 Type Possible values w0_0 0x2203 (MSByte) Default value 0x2204(LSByte) Purpose Type w0_1 0x2207 (MSByte) Default value ...

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Register map Table 35. Pipe1 RGB To YUV matrix manual control Index w2_0 0x221b (MSByte) Default value 0x221c (LSByte) Purpose Type w2_1 0x2220 (MSByte) Default value 0x221f (LSByte) Purpose Type w2_2 0x2223 (MSByte) Default value 0x2224 (LSByte) Purpose Type YinY ...

Page 77

VL6624/VS6624 Pipe 0 gamma manual control Table 36. Pipe 0 gamma manual control Index fGammaManuCtrl Default value Purpose 0x2280 Type Possible values bRPeakGamma Default value 0x2282 Purpose Type bGPeakGamma Default value 0x2284 Purpose Type bBPeakGamma Default value 0x2286 Purpose Type ...

Page 78

Register map Pipe 1 Gamma manual control Table 37. Pipe 1 Gamma manual control Index fGammaManuCtrl Default value Purpose 0x2300 Type Possible values bRPeakGamma Default value 0x2302 Purpose Type bGPeakGamma Default value 0x2304 Purpose Type bBPeakGamma Default value 0x2306 Purpose ...

Page 79

VL6624/VS6624 Fade to black Table 38. Fade to black Index fDisable 0x2480 Default value Purpose Type fpBlackValue 0x2483 (MSByte) 0x2484(LSByte) Default value Purpose Type fpDamperLowThreshold 0x2487 (MSByte) 0x2488 (LSByte) Default value Purpose Type fpDamperHighThreshold 0x248b (MSByte) 0x248c (LSByte) Default value ...

Page 80

Register map Output formatter control Table 39. Output formatter control Index bCodeCheckEn 0x2580 Default value Type bBlankFormat 0x2582 Default value Type bSyncCodeSetup Default value Type 0x2584 flag bits bHSyncSetup Default value Type 0x2586 flag bits bVSyncSetup Default value Type 0x2588 ...

Page 81

VL6624/VS6624 Table 39. Output formatter control Index bPClkSetup Default value Type 0x258a flag bits fPclkEn Default value 0x258c Type Possible values bOpfSpSetup 0x258e Default value type bBlankData_MSB Default value 0x2590 Type Possible values bBlankData_LSB Default value 0x2592 Type Possible values ...

Page 82

Register map Table 39. Output formatter control Index bYuvSetup Default value 0x2596 Type flag bits bVsyncRisingCoarseH 0x2598 Default value Type bVsyncRisingCoarseL 0x259a Default value Type bVsyncRisingFineH 0x259c Default value Type bVsyncRisingFineL 0x259e Default value Type bVsyncFallingCoarseH 0x25a0 Default value Type ...

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VL6624/VS6624 Table 39. Output formatter control Index bHsyncRisingL 0x25aa Default value Type bHsyncFallingH 0x25ac Default value Type bHsyncFallingL Default value 0x25ae type bOutputInterface Default value Type 0x25b0 flag bits bCCPExtraData 0x25b2 Default value Type 1. Can be controlled in all ...

Page 84

Register map NoRA controls Table 40. NoRA controls Index fDisable Default value Type 0x2600 Possible values bUsage Default value 0x2602 Purpose Type bSplit_Kn Default value 0x2604 Purpose Type bSplit_Nl Default value 0x2606 Purpose Type bTight_Green Default value 0x2608 Purpose Type ...

Page 85

VL6624/VS6624 Table 40. NoRA controls Index fpDamperHighThreshold 0x2611 (MSByte) Default value 0x2612 (LSByte) Purpose Type MinimumDamperOutput 0x2615 (MSByte) Default value 0x2616 (LSByte) Purpose Type 1. Can be controlled in all stable states (1) NoRAControls 0x6a62 (4997120) High Threshold for exposure ...

Page 86

Optical specifications 12 Optical specifications Table 41. Optical specifications Parameter Optical format Effective focal length Aperture (F number) Horizontal field of view Depth of field TV distortion 1. All measurements made at 23°C ± 2°C 12.1 Average sensitivity The average ...

Page 87

VL6624/VS6624 12.2 Spectral response The spectral response for the VS6524 sensor is shown in Figure 32. Quantum efficiency (H8S1 - 3.0 µm pixel Optical specifications Figure 32 87/106 ...

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Electrical characteristics 13 Electrical characteristics 13.1 Absolute maximum ratings Table 43. Absolute maximum ratings Symbol T Storage temperature STO V Digital power supplies DD AVDD Analog power supplies Caution: Stress above those listed under “Absolute Maximum Ratings” can cause permanent ...

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VL6624/VS6624 13.3 DC electrical characteristics Note: Over operating conditions unless otherwise specified. Table 45. DC electrical characteristics Symbol Description V Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage OH Input ...

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Electrical characteristics Table 47. Typical current consumption - Sensor mode SXGA 15 fps Symbol Description supply current in power I PD down mode supply current in Standby I stanby mode supply current in Stop I Stop mode supply current in ...

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VL6624/VS6624 13.6 I²C slave interface VL6624/VS6624 contains an I²C-type interface using two signals: a bidirectional serial data line (SDA) and an input-only serial clock line (SCL). See interface for detailed description of protocol. Table 49. Serial interface voltage levels Symbol ...

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Electrical characteristics Table 50. Timing specification Symbol Parameter f SCL clock frequency SCL t Hold time for a repeated start HD;STA t LOW period of SCL LOW t HIGH period of SCL HIGH Set-up time for a repeated start t ...

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VL6624/VS6624 Figure 34. Timing specification SDA t t SU;STA HD;STA SCL t LOW S START All values are referred Figure 35. SDA/SCL rise and fall times 0 0 ...

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Electrical characteristics 13.7 Parallel data interface timing VL6624/VS6624 contains a parallel data output port (D[7:0]) and associated qualification signals (HSYNC, VSYNC, PCLK and FSO). This port can be enabled and disabled (tri-stated) to facilitate multiple camera systems or bit-serial output ...

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VL6624/VS6624 14 User precaution As is common with many CMOS imagers the camera should not be pointed at bright static objects for long periods of time as permanent damage to the sensor may occur. User precaution 95/106 ...

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... Package mechanical data 15 Package mechanical data 15.1 SmOP Figure 37 and Figure 38 Figure 39 Figure 40 and 96/106 present the package outline socket module VS6624Q0KP. present the package outline FPC module VS6624P0LP. VL6624/VS6624 ...

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... VL6624/VS6624 Figure 37. Package outline socket module VS6624Q0KP Package mechanical data 97/106 ...

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... Package mechanical data Figure 38. Package outline socket module VS6624Q0KP 2.64 0.00 0.55 +0.02 98/106 1.00 0.90 1.75 2.65 3.55 4.45 5.35 6.25 VL6624/VS6624 2.30 1.00 ...

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VL6624/VS6624 Figure 39. Package outline FPC module VS6624P0LP 0.05 - +0.25 (1) 0.10 4.00 1.2 ref 2.83 ±0.07 1.15 4.5 8.00 1.20 Package mechanical data ±0.15 6.16 ±0.15 3.96 0.30 ref 1.57 99/106 ...

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Package mechanical data Figure 40. Package outline FPC module VS6624P0LP 100/106 A datum at 4.40 VL6624/VS6624 ...

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VL6624/VS6624 15.2 LGA In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the inner ...

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Package mechanical data Table 52. LGA package mechanical data (continued) Symbol PHI z L bbb ccc ddd eee 102/106 Data book (mm) Min. Typ. 4° 5° 1.65 0.7 0.8 0.01 0.1 0.08 0. VL6624/VS6624 ...

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VL6624/VS6624 Figure 41. VL6524QOMH outline drawing Package mechanical data 103/106 ...

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... Ordering information Table 53. VL6524 pin assignment Pin Signal 1 AVDD 2 GND 3 SDA 4 SCL VDD 7 CLK 8 GND 9 FSO 16 Ordering information Table 54. Order codes Part number VS6624P0LP VS6624Q0KP VL6624QOMH 104/106 Pin Signal Pin 10 GND AVDD 24 16 HSYNC 25 17 VSYNC 26 18 GND 27 SMOP2 VGA 8x8, flex SMOP2 VGA 8x8, socket LGA 10x10x1 ...

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VL6624/VS6624 17 Revision history Table 55. Document revision history Date 1-Feb-2006 14-Apr-2006 15-Jun-2006 06-Nov-2006 06-Dec-2006 08-Jan-2007 02-Jul-2007 27-Apr-2010 Revision 1 Initial release. Table 51: Parallel data interface timings Updated 2 Updated module outline drawing s Updated V values in IL ...

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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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