74OL60113SD Fairchild Semiconductor, 74OL60113SD Datasheet
74OL60113SD
Specifications of 74OL60113SD
Related parts for 74OL60113SD
74OL60113SD Summary of contents
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... Replaces fast pulse transformers Package ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 Description OPTOLOGIC™ is the first family of truly logic compatible optically coupled logic interface gates. The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions is available as a buffer ( inverter ( ...
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... V (Data In) V (Input Ground) GND Device Configuration Logic Compatibility Part Number Input 74OL6000 LSTTL 74OL6001 LSTTL 74OL6010 LSTTL 74OL6011 LSTTL ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 Vcc 150 Ω TYP. GND TTL OUTPUT CIRCUIT 74OL6000/01 Output ) CCI Output Logic Function ...
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... Schematics LSTLL to TTL Buffer 74OL6010 LSTLL to CMOS Buffer ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 74OL6000 NOISE SHIELD NOISE SHIELD LSTLL to CMOS Inverter 3 74OL6001 NOISE SHIELD LSTLL to TTL Inverter 74OL6011 NOISE SHIELD www.fairchildsemi.com ...
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... Withstand Insulation Test ISO (1) Voltage R Insulation Resistance ISO Note: 1. Device considered a two-terminal device. Pins 1, 2 and 3 shorted together, and Pins 4, 5 and 6 shorted together. ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0 25°C unless otherwise specified) A Parameter Device All All All ...
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... Its purpose is to stabilize the operation of the high-gain amplifiers. Failure to provide the bypass will impair the DC and switching properties. The total lead length between capacitor and optocoupler should not exceed 1.5mm. See Fig. 20. ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0 0° ...
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... Failure to provide the bypass will impair the DC and switching properties. The total lead length between capacitor and optocoupler should not exceed 1.5mm. See Fig. 20. 4. For example, assuming a V CCI ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0 0°C to 70°C Unless otherwise specified) ...
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... T - AMBIENT TEMPERATURE ( ˚C) A Figure 5. High-Level Output Voltage vs. Ambient Temperature 4.5V CCI V = 4.5V 4 CCO I = -400 -40 - AMBIENT TEMPERATURE ( ˚C) A ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 Figure 2. Input Supply Current vs. Ambient Temperature 100 I CCOH I CCOL I CCOH I CCOL I CCOH I CCOL 74OL6000/ 5.5V CCI V = 5.5V ...
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... T - AMBIENT TEMPERATURE ( ˚C) A Figure 11. Supply Current vs. Supply Voltage CCO RANGE FOR 74OL6000/6001 SUPPLY VOLTAGE ( V) CC ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 (Continued) = 4.5V = 15V = 15V 60 80 100 R = 470 L P.W = 200ns t PLH t PLH PHL 100 I CCO Figure 8. 74OL6000/01 Switching Times vs. ...
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... AMBIENT TEMPERATURE ( ° Test Circuits V CCI +5 V PULSE GEN PW =200ns PERIOD = 1 µ 5ns Zo = 50Ω ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 (Continued 5.0V CCI V = 5.0V CCO 60 80 100 Figure 15. Switching Time Test Circuit 1 6 .1µ Figure 16. Common Mode Rejection Test Circuit ...
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... Switching and Rejection Waveforms Figure 17. 74OL6000/01 Switching Times vs. Ambient Temperature INPUT PLH OUTPUT (74OL6000 OUTPUT (74OL6001) t PHL PCB Layout INPUT DATA IN ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 INPUT, V 1.3V t PHL 90% 1.3V 10 90% 1.3V 10% t PLH Figure 19. Common Mode Rejection Waveforms ...
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... MIN 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Note: All dimensions are in inches (millimeters). ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 Surface Mount 0.350 (8.89) 0.330 (8.38 0.070 (1.78) 0.045 (1.14) ...
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... Marking Information Definitions ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 .S Surface Mount Lead Bend Surface Mount; Tape and Reel .W 0.4" Lead Spacing VDE 0884 VDE 0884, 0.4" Lead Spacing .3S VDE 0884, Surface Mount VDE 0884, Surface Mount, Tape and Reel ...
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... Ramp up = 3C/sec 0 0 0.5 1 1.5 2 Time (Minute) ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0.4 215 C, 10–30 s • Peak reflow temperature: 225 C (package surface temperature) • Time of temperature higher than 183 C for 60–150 seconds • One time soldering reflow is recommended 2 ...
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... VERTICAL = 2V/DIV 0 1.1 K 2N4252 100 F 2N4252 1.1 K 2N2222 1 K ALL DIODES 1N6263 Figure D Buffer ©2000 Fairchild Semiconductor Corporation 74OL60XX Rev. 1.0 taken from an isolated power supply and distributed through a drain or mes- CCI Figure B HORIZONTAL = 20ns/DIV 42-12, 02 VERTICAL = 2V/DIV PRSG 100 ns BIT INTERVAL 250 FT ...
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... TRADEMARKS The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Green FPS™ Build it Now™ Green FPS™ e-Series™ CorePLUS™ GTO™ ...