IR1153SPBF International Rectifier, IR1153SPBF Datasheet - Page 10

IC PFC ONE CYCLE CONTROL 8SOIC

IR1153SPBF

Manufacturer Part Number
IR1153SPBF
Description
IC PFC ONE CYCLE CONTROL 8SOIC
Manufacturer
International Rectifier
Datasheet

Specifications of IR1153SPBF

Mode
Continuous Conduction (CCM)
Frequency - Switching
18.3kHz ~ 25kHz
Current - Startup
26µA
Voltage - Supply
14 V ~ 17 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
*
Package / Case
*
Startup Current
26µA
Operating Supply Current
7mA
Duty Cycle (%)
99%
Frequency
22.2kHz
Digital Ic Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-25°C To +125°C
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Supply Voltage Range
14V To 17V
Package
8-lead SOIC
Circuit
PFC IC
Vcc Range (v)
14V-17V
Out Peak Current (a)
+/- 0.75
Switching Frequency (khz)
22.2
Environment
Industrial
Over-voltage Protection
Yes
Brown-out Protection
Yes
Pbf
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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IR1153 Pin Description
Pin COM: This is ground potential pin of the IC.
All internal devices are referenced to this point.
Pin COMP: External circuitry from this pin to
ground compensates the system voltage loop and
programs the soft start time. The COMP pin is
essentially the output of the voltage error
amplifier. The voltage loop error signal V
the control algorithm is derived from V
=V
using an internal resistance to below V
threshold whenever the IC is pushed into Stand-
by mode (BOP or OLP condition) or UVLO/Sleep
mode. The gate drive output and logic functions of
the IC are inactive if VCOMP is less than
V
voltage has to be less than V
commence operation (i.e. a pre-bias on VCOMP
will not allow IC to commence operation).
Pin ISNS: ISNS pin is tied to the input of the
current sense amplifier of the IC. The voltage at
this pin, which provides the current sense
information to the IC, has to be a negative voltage
wrt the COM pin. Also since the IC is based on
average current mode, the entire inductor current
information is necessary. A current sense resistor,
located below system ground along the return
path to the bridge rectifier, is the preferred current
sensing method. ISNS pin is also the inverting
input to the cycle-by-cycle peak current limit
comparator. Whenever V
threshold in magnitude, the gate drive is
instantaneously disabled. Any external filtering of
the ISNS pin must be performed carefully in order
to ensure that the integrity of the current sense
signal is maintained for cycle-by-cycle peak
current limit protection.
Pin BOP (Brown-out Protection): This pin is
used to sense the rectified AC input line voltage
through a resistor divider/capacitor network which
is in effect a voltage division and averaging
network, representing a scaled down signal of the
average rectified input voltage (average DC
voltage + 2xf
pin voltage has to exceed V
enable the IC to exit Stand-by mode and enter
normal operation. A Brown-out situation is
detected whenever the pin voltage falls below
V
COMP,START
BOP
COMP
and the IC is pushed into Stand-by mode.
–V
COMP,START
. Also during start-up, the VCOMP
AC
ripple). During start-up the BOP
). V
COMP
ISNS
is actively discharged
COMP,START
BOP(EN)
exceeds V
in order to
in order to
COMP,START
m
COMP
used in
ISNS(PK)
(V
m
10
Subsequently the pin has to exceed V
the IC to exit Stand-by and resume normal
operation.
Pin OVP/EN: The OVP/EN pin is connected to the
non-inverting input of the OVP(OVP) overvoltage
comparator shown in the block diagram and thus
is used to detect output overvoltage situations.
The output voltage information is communicated
to the OVP pin using a resistive divider. This pin
also serves the second purpose of an ENABLE
pin. The OVP/EN pin can be used to activate the
IC into “micropower sleep” mode by pulling the
voltage on this pin below the V
Pin VFB: The converter output voltage is sensed
via a resistive divider and fed into this pin. VFB
pin is the inverting input of the output voltage error
amplifier. The non-inverting input of this amplifier
is connected to an internal 5V reference.
impedance of the divider string must be low
enough that it does not introduce substantial error
due to the input bias currents of the amplifier, yet
high enough to minimize power dissipation.
Typical value of external divider total impedance
will be around 2MΩ. VFB pin is also the inverting
input to the Open Loop comparator. The IC is held
in Stand-by Mode whenever VFB pin voltage is
below V
Pin VCC: This is the supply voltage pin of the IC
and sense node for the undervoltage lock out
circuit. It is possible to turn off the IC by pulling
this pin below the minimum turn off threshold
voltage, V
pin is not internally clamped.
Pin GATE: This is the gate drive output of the IC.
It provides a drive current of ±0.75A peak with
matched rise and fall times. The gate drive output
of the IC is clamped at 14.1V(Typ).
OLP
CC(UVLO)
threshold.
without damage to the IC. This
© 2011 International Rectifier
SLEEP
threshold.
IR1153S
BOP(EN)
The
for

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