KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 22

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KSZ8863RLL-EVAL

Manufacturer Part Number
KSZ8863RLL-EVAL
Description
BOARD EVALUATION FOR KSZ8863RLL
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8863RLL-EVAL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3868
Micrel, Inc.
Register 195 bit[5:4] = 10 Soft Power Down Mode
Register 195 bit[5:4] = 11 Power Saving Mode
Register 29,45 bit 3 =1 Port Based Power Down Mode
Table 1 indicates all internal function blocks status under four different power management operation modes.
Normal Operation Mode
This is the default setting bit[5:4]=00 in register 195 after the chip power-up or hardware reset . When
KSZ8863MLL/FLL/RLL is in this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host
interface is ready for CPU read or write.
During the normal operation mode, the host CPU can set the bit[5:4] in register 195 to transit the current normal operation
mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8863MLL/FLL/RLL is not connected to an active link partner. In this mode, the device will save up to 50% of the
power. If the cable is not plugged, the KSZ8863MLL/FLL/RLL can automatically enter to a low power state, a.k.a., the
energy detect mode. In this mode, KSZ8863MLL/FLL/RLL will keep transmitting 120ns width pulses at 1 pulse/s rate.
Once activity resumes due to plugging a cable or attempting by the far end to establish link, the KSZ8863MLL/FLL/RLL
can automatically power up to normal power state in energy detect mode.
Energy detect mode consists of two states, normal power state and low power state. While in low power state, the
KSZ8863MLL/FLL/RLL reduces power consumption by disabling all circuitry except the energy detect circuitry of the
receiver. The energy detect mode is entered by setting bit[5:4]=01 in register 195. When the KSZ8863MLL/FLL/RLL is in
this mode, it will monitor the cable energy. If there is no energy on the cable for a time longer than pre-configured value at
bit[7:0] Go-Sleep time in register 196, KSZ8863MLL/FLL/RLL will go into a low power state. When KSZ8863MLL/FLL/RLL
is in low power state, it will keep monitoring the cable energy. Once the energy is detected from the cable,
KSZ8863MLL/FLL/RLL will enter normal power state. When KSZ8863MLL/FLL/RLL is at normal power state, it is able to
transmit or receive packet from the cable.
Soft Power Down Mode
The soft power down mode is entered by setting bit[1:0]=10 in register 195. When KSZ8863MLL/FLL/RLL is in this mode,
all PLL clocks are disabled, the PHY and the MAC are off, all internal registers value will not change. Any dummy host
access will wake-up this device from current soft power down mode to normal operation mode.
Power Saving Mode
The power saving mode is entered when auto-negotiation mode is enabled, cable is disconnected, and by setting
bit[1:0]=11 in register 195. When KSZ8863MLL/FLL/RLL is in this mode, all PLL clocks are enabled, MAC is on, all
internal registers value will not change, and host interface is ready for CPU read or write. In this mode, it mainly controls
the PHY transceiver on or off based on line status to achieve power saving. The PHY remains transmitting and only turns
off the unused receiver block. Once activity resumes due to plugging a cable or attempting by the far end to establish link,
the KSZ8863MLL/FLL/RLL can automatically enabled the PHY power up to normal power state from power saving mode.
During this power saving mode, the host CPU can set bit[1:0] =0 in register 195 to transit the current power saving mode
to any one of the other three power management operation modes.
The KSZ8863MLL/FLL/RLL also features a per-port power down mode. To save power, a PHY port that is not in use can
be powered down via port control register, or MIIM PHY register.
November 2009
KSZ8863MLL/FLL/RLL
Function Blocks
Internal PLL Clock
Tx/Rx PHY
MAC
Host Interface
Power Management Operation Modes
Normal Mode
Enabled
Enabled
Enabled
Enabled
Table 3. Internal Function Block Status
Power Saving Mode
Enabled
Rx unused block disabled Energy detect at Rx
Enabled
Enabled
22
Energy Detect Mode
Disabled
Disabled
Disabled
Soft Power Down Mode
Disabled
Disabled
Disabled
Disabled
KSZ8863MLL/FLL/RLL
M9999-110309-1.1

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