KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 30

• Manufacturer Part Number: KSZ8863RLL-EVAL
• Description: BOARD EVALUATION FOR KSZ8863RLL
• Manufacturer: Micrel Inc

Specifications of KSZ8863RLL-EVAL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3868

Micrel, Inc.
MII Management (MIIM) Interface
The KSZ8863MLL/FLL/RLL supports the IEEE 802.3 MII Management Interface, also known as the Management Data
Input/Output (MDIO) Interface. This interface allows upper-layer devices to monitor and control the states of the
KSZ8863MLL/FLL/RLL. An external device with MDC/MDIO capability is used to read the PHY status or configure the
PHY settings. Further detail on the MIIM interface is found in Clause 22.2.4.5 of the IEEE 802.3u Specification.
The MIIM interface consists of the following:
The MIIM Interface can operate up to a maximum clock speed of 5MHz.
The following table depicts the MII Management Interface frame format.
November 2009
• A physical connection that incorporates the data line (SDA_MDIO) and the clock line (SCL_MDC).
• A specific protocol that operates across the aforementioned physical connection that allows an external controller to
• Access to a set of eight 16-bit registers, consisting of six standard MIIM registers [0:5] and two custom MIIM registers
communicate with the KSZ8863MLL/FLL/RLL device.
[29, 31].
Read
Write
Preamble
32 1’s
32 1’s
Start of
Frame
01
01
Table 8. MII Management Interface Frame Format
Read/Write
OP Code
10
01
PHY
Address
Bits [4:0]
AAAAA
AAAAA
30
REG
Address
Bits [4:0]
RRRRR
RRRRR
TA
Z0
10
Data Bits [15:0]
DDDDDDDD_DDDDDDDD
DDDDDDDD_DDDDDDDD
KSZ8863MLL/FLL/RLL
M9999-110309-1.1
Idle
Z
Z