KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 35

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KSZ8863RLL-EVAL

Manufacturer Part Number
KSZ8863RLL-EVAL
Description
BOARD EVALUATION FOR KSZ8863RLL
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8863RLL-EVAL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3868
Micrel, Inc.
Ports in Forwarding states fully participate in both data forwarding and MAC learning.
Forwarding state: packets are forwarded and received normally. Learning is enabled.
Port setting: “transmit enable = 1, receive enable = 1, learning disable = 0.”
Software action: The processor should program the static MAC table with the entries that it needs to receive (e.g., BPDU
packets). The “overriding” bit should be set so that the switch will forward those specific packets to the processor. The
processor may send packets to the port(s) in this state, see “Tail Tagging Mode” section for details. Address learning is
enabled on the port in this state.
RSTP uses only one type of BPDU called RSTP BPDUs. They are similar to STP Configuration BPDUs with the exception
of a type field set to “version 2” for RSTP and “version 0” for STP, and a flag field carrying additional information.
Tail Tagging Mode
The Tail Tag is only seen and used by the port 3 interface, which should be connected to a processor. It is an effective
way to retrieve the ingress port information for spanning tree protocol IGMP snooping and other applications. The Bit 1
and bit 0 in the one byte tail tagging is used to indicate the source/destination port in port 3. Bit 3 and bit 2 are used for the
priority setting of the ingress frame in port 3. Other bits are not used. The Tail Tag feature is enable by setting register 3
bit 6.
November 2009
Ingress to Port 3 (Host -> KSZ8863MML)
Bit [1,0]
0,0
0,1
1,0
1,1
Bit [3,2]
0,0
0,1
1,0
1,1
Egress from Port 3 (KSZ8863MML->Host)
Bit [0]
0
1
Figure 7. Tail Tag Frame Format
Figure 8. Tail Tag Rules
Destination Port
Normal (Address Look up)
Port 1
Port 2
Port 1 and 2
Frame Priority
Priority 0
Priority 1
Priority 2
Priority 3
Source Port
Port 1
Port 2
35
KSZ8863MLL/FLL/RLL
M9999-110309-1.1

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