KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 37

• Manufacturer Part Number: KSZ8863RLL-EVAL
• Description: BOARD EVALUATION FOR KSZ8863RLL
• Manufacturer: Micrel Inc

Specifications of KSZ8863RLL-EVAL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3868

Micrel, Inc.
To reduce congestion, it is a good practice to make sure the egress bandwidth exceeds the ingress bandwidth.
Unicast MAC Address Filtering
The unicast MAC address filtering function works in conjunction with the static MAC address table. First, the static MAC
address table is used to assign a dedicated MAC address to a specific port. If a unicast MAC address is not recorded in
the static table, it is also not learned in the dynamic MAC table. The KSZ8863MLL/FLL/RLL is then configured with the
option to either filter or forward unicast packets for an unknown MAC address. This option is enabled and configured in
register 14.
This function is useful in preventing the broadcast of unicast packets that could degrade the quality of the port in
applications such as voice over Internet Protocol (VoIP).
Configuration Interface
The KSZ8863MLL/FLL/RLL can operate as both a managed switch and an unmanaged switch.
In unmanaged mode, the KSZ8863MLL/FLL/RLL is typically programmed using an EEPROM. If no EEPROM is present,
the KSZ8863MLL/FLL/RLL is configured using its default register settings. Some default settings are configured via strap-
in pin options. The strap-in pins are indicated in the “Pin Description and I/O Assignment” table.
I
With an additional I
“broadcast storm protection” and “rate control” without the need of an external processor.
For KSZ8863MLL/FLL/RLL I
120 (as defined in the KSZ8863MLL/FLL/RLL register map) with the exception of the “Read Only” status registers. After
the de-assertion of reset, the KSZ8863MLL/FLL/RLL sequentially reads in the configuration data for all 121 registers,
starting from register 0.
The following is a sample procedure for programming the KSZ8863MLL/FLL/RLL with a pre-configured EEPROM:
November 2009
2
C Master Serial Bus Configuration
1. Connect the KSZ8863MLL/FLL/RLL to the EEPROM by joining the SCL and SDA signals of the respective
2. Enable I
3. Check to ensure that the KSZ8863MLL/FLL/RLL reset signal input, RSTN, is properly connected to the external
4. Program the desired configuration data into the EEPROM.
5. Place the EEPROM on the board and power up the board.
6. Assert an active-low reset to the RSTN pin of the KSZ8863MLL/FLL/RLL. After reset is de-asserted, the
Note: For proper operation, check to ensure that the KSZ8863MLL/FLL/RLL PWRDN input signal is not
asserted during the reset operation. The PWRDN input is active low.
devices.
reset source at the board level.
KSZ8863MLL/FLL/RLL begins reading the configuration data from the EEPROM. The KSZ8863MLL/FLL/RLL
checks that the first byte read from the EEPROM is “88”. If this value is correct, EEPROM configuration continues.
If not, EEPROM configuration access is denied and all other data sent from the EEPROM is ignored by the
KSZ8863MLL/FLL/RLL.
2
C master mode by setting the KSZ8863MLL/FLL/RLL strap-in pins, PS[1:0] to “00”.
2
C (“2-wire”) EEPROM, the KSZ8863MLL/FLL/RLL can perform more advanced switch features like
2
C Master configuration, the EEPROM stores the configuration data for register 0 to register
Figure 9. EEPROM Configuration Timing Diagram
37
KSZ8863MLL/FLL/RLL
M9999-110309-1.1