KSZ8863RLL-EVAL Micrel Inc, KSZ8863RLL-EVAL Datasheet - Page 52

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KSZ8863RLL-EVAL

Manufacturer Part Number
KSZ8863RLL-EVAL
Description
BOARD EVALUATION FOR KSZ8863RLL
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8863RLL-EVAL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3868
Micrel, Inc.
Register 6 (0x06): Global Control 4
Register 7 (0x07): Global Control 5
Note: (1) 100BT Rate: 148,800 frames/sec * 67 ms/interval * 1% = 99 frames/interval (approx.) = 0x63
September 2009
2-0
7-0
Bit
Bit
7
6
5
4
3
Reserved
Switch MII Half
Duplex Mode
Switch MII
Flow Control
Enable
Switch MII
10BT
Null VID
Replacement
Broadcast
Storm
Protection
Rate
Bit [10:8]
Broadcast
Storm
Protection
Rate
Bit [7:0]
Name
Name
(1)
(1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
Do not change the default values.
= 1, enable MII interface half-duplex mode.
= 0, enable MII interface full-duplex mode.
= 1, enable full duplex flow control on Switch MII interface.
= 0, disable full duplex flow control on Switch MII interface.
= 1, the switch interface is in 10Mbps mode
= 0, the switch interface is in 100Mbps mode
= 1, will replace NULL VID with port VID (12 bits)
= 0, no replacement for NULL VID
This register along with the next register determines how many “64
byte blocks” of packet data are allowed on an input port in a preset
period. The period is 67ms for 100BT or 500ms for 10BT. The
default is 1%.
Description
This register along with the previous register determines how many
“64 byte blocks” of packet data are allowed on an input port in a
preset period. The period is 67ms for 100BT or 500ms for 10BT.
The default is 1%.
52
KSZ8863MLL/FLL/RLL
Default
Default
0x63
000
0
0
1
0
0
M9999-091009-1.1

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