DK-PCIE-ECP2M-011 Lattice, DK-PCIE-ECP2M-011 Datasheet - Page 17

• Manufacturer Part Number: DK-PCIE-ECP2M-011
• Description: MCU, MPU & DSP Development Tools PCI Express Dev Kit
• Manufacturer: Lattice
• Series: ECP2r

Specifications of DK-PCIE-ECP2M-011

• Silicon Manufacturer: Lattice Semiconductor
• Silicon Family Name: LatticeECP2M
• Kit Contents: Board, IspDOWNLOAD Cable, Power Supply
• Features: Logic Analyzer Connector, On-Board 256 MB DDR2 Memory
• Svhc: No
• Rohs Compliant: Yes
• Main Purpose: Interface, Connectivity
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: LFE2M50E-6FN672C
• Primary Attributes: x1/x4 PCI Express Edge Connectors, 256 MB DDRD Memory
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 10. x4 PCI Express Connections (Continued)
FPGA Test Pins
(see Appendix A, Figure 27)
General Purpose DIP Switch
(see Appendix A, Figure 27, SW5)
General-purpose FPGA pins are available for user applications. FPGA pins are connected to a switch (SW5) which
is an SPST side actuated DIP switch. The switch is physically located on the secondary side of the PCB along the
back-panel edge. The switches are connected to a logic level 0 when depressed toward the board and a 1 when
away from the board. The designated pins are connected according to Table 11.
Table 11. FPGA Test Pins (See Appendix A, Figure 26)
U_HDOUTP_1
U_HDOUTN_1
U_HDINP_1
U_HDINN_1
U_HDOUTP_0
U_HDOUTN_0
U_HDINP_0
U_HDINN_0
U_REFCLKP
U_REFCLKN
PCIE_PERSETN
CML Pin Name
FPGA BGA
R7
U1
R6
P8
T5
T1
T4
T3
FPGA Pin
A20
B20
A23
B23
A21
B21
A24
B24
D19
E19
C12
SW5 Switch Position
PCIe_CLKp
PCIe_CLKn
PERSTN
PERp2
PERn2
PERp3
PERn3
PETp2
PETn2
PETp3
PETn3
PCIE
1
2
3
4
5
6
7
8
PCI Express Edge
17
A25
A26
B23
B24
A29
A30
B27
B28
A13
A14
A11
LatticeECP2M PCI Express Solutions Board
Integrated endpoint block transmit pair
Integrated endpoint block receive pair
Integrated endpoint block transmit pair
Integrated endpoint block receive pair
Integrated endpoint block differential clock pair
Fundamental PCI Express reset
Logic 1
Logic 0
1
2
3
Description
4
5
6
7
User’s Guide
8
PCB