DK-PCIE-ECP2M-011 Lattice, DK-PCIE-ECP2M-011 Datasheet - Page 18

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DK-PCIE-ECP2M-011

Manufacturer Part Number
DK-PCIE-ECP2M-011
Description
MCU, MPU & DSP Development Tools PCI Express Dev Kit
Manufacturer
Lattice
Series
ECP2r
Datasheet

Specifications of DK-PCIE-ECP2M-011

Silicon Manufacturer
Lattice Semiconductor
Silicon Family Name
LatticeECP2M
Kit Contents
Board, IspDOWNLOAD Cable, Power Supply
Features
Logic Analyzer Connector, On-Board 256 MB DDR2 Memory
Svhc
No
Rohs Compliant
Yes
Main Purpose
Interface, Connectivity
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
LFE2M50E-6FN672C
Primary Attributes
x1/x4 PCI Express Edge Connectors, 256 MB DDRD Memory
Secondary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Figure 19. 8-position DIP Switch (SW5) on Secondary PCB Side
General Purpose LEDs
(see Appendix A, Figure 27, D14-D21)
LEDs are provided along the back panel edge of the PCB. These LEDs are connected to general-purpose FPGA
I/Os. The LEDs are illuminated by the associated FPGA outputs being driven to a valid LOW level. The use of these
LEDs is defined for PCI Express applications to observe the status of the PCI Express link during operation. The
LEDs must be included in the FPGA design. These status LEDs are available in both x1 or x4 configurations. The
back panel marking reflects PCI Express specific status.
Table 12. LED Definitions
FPGA Pin#
W2
U6
V2
V1
U4
U3
U2
U5
PCI Express x1
PCB Designator
D20
D21
D16
D17
D14
D15
D18
D19
FPGA Pin#
AA3
W6
U3
U8
Y5
Y4
Y3
V7
18
LatticeECP2M PCI Express Solutions Board
PCB Designator
PCI Express x4
D28
D29
D25
D24
D22
D23
D26
D27
Polling state active
Data link up active
L0 state active
User’s Guide
User defined
User defined
User defined
User defined
Description
PLL locked

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