LFE3-95E-PCIE-DKN Lattice, LFE3-95E-PCIE-DKN Datasheet - Page 106
LFE3-95E-PCIE-DKN
Manufacturer Part Number
LFE3-95E-PCIE-DKN
Description
MCU, MPU & DSP Development Tools LatticeECP3 PCI Express Dev Kit
Manufacturer
Lattice
Datasheet
1.LFE3-150EA-7FN672CTW.pdf
(130 pages)
Specifications of LFE3-95E-PCIE-DKN
Processor To Be Evaluated
LFE3-95EA-x
Processor Series
LatticeECP3
Interface Type
SPI
Operating Supply Voltage
1.2 V to 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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JTAG Port Timing Specifications
Figure 3-25. JTAG Port Timing Waveforms
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
MAX
BTCP
BTCPH
BTCPL
BTS
BTH
BTRF
BTCO
BTCODIS
BTCOEN
BTCRS
BTCRH
BUTCO
BTUODIS
BTUPOEN
Symbol
Data to be
Data to be
driven out
captured
from I/O
to I/O
TMS
TDO
TCK
TDI
TCK clock frequency
TCK [BSCAN] clock pulse width
TCK [BSCAN] clock pulse width high
TCK [BSCAN] clock pulse width low
TCK [BSCAN] setup time
TCK [BSCAN] hold time
TCK [BSCAN] rise/fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to valid disable
TAP controller falling edge of clock to valid enable
BSCAN test capture register setup time
BSCAN test capture register hold time
BSCAN test update register, falling edge of clock to valid output
BSCAN test update register, falling edge of clock to valid disable
BSCAN test update register, falling edge of clock to valid enable
t
BTCPH
Over Recommended Operating Conditions
t
BTCOEN
t
BTUPOEN
t
BTCPL
t
BTCRS
t
BTS
Parameter
Data Captured
3-54
V
t
a
BTCRH
t
d i l
BTH
D
V
a
a
d i l
a t
D
a
t
a t
BTCO
t
BUTCO
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
t
BTCP
V
a
d i l
D
V
Min
40
20
20
10
50
25
a
—
—
—
—
—
—
—
a
8
8
d i l
a t
D
t
BTCODIS
a
a t
t
BTUODIS
Max
25
10
10
10
25
25
25
—
—
—
—
—
—
—
—
mV/ns
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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