A3PE-BRD600-SKT Actel, A3PE-BRD600-SKT Datasheet - Page 19
A3PE-BRD600-SKT
Manufacturer Part Number
A3PE-BRD600-SKT
Description
MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
Manufacturer
Actel
Datasheet
1.A3PE-BRD600-SKT.pdf
(106 pages)
Specifications of A3PE-BRD600-SKT
Processor To Be Evaluated
ProASIC3/E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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FPGA – LCD Interface
Description
ProASIC3/E Starter Kit User’s Guide and Tutorial
An 8 × 1 LCD module is provided on the ProASIC3 Evaluation board for demonstrating the board’s functionality.
2-3
The LCD module MDLS-81809-SS-LV-G-LED-04-G can be operated in either 4-bit data mode or 8-bit data mode.
In this PA3 evaluation board, the above LCD module is being operated in 4-bit data mode to minimize the number of
FPGA lines committed to the interface. The 4-bit data lines (DB4, DB5, DB6, and DB7) and the required control
signals for this LCD module, specifically RS (Register Select), R/~W (Read/~Write), and E (Enable) lines, are driven
from BANK0 I/O lines of FPGA. These BANK0 I/O lines of FPGA are configured as LVTTL outputs for driving the
LCD.
Both V
LVTTL mode.
The interconnection details between the FPGA and the LCD module are listed in
provides detailed information about the LCD module.
CCI
and VMV power points of Bank0 are from a fixed 3.3 volts source, thereby enabling BANK0 to function in
Part Number
Manufacturer Name
Display Type
Display Mode
Display Format
Character Format
Character Size
Backlight
Viewing Area
Operating Temperature
Voltage-Supply
FPGA Pin No.
197
198
194
193
192
191
190
Table 2-4 · FPGA – LCD Interconnections
Table 2-3 · LCD Module Details
LCD Pin No.
MDLS-81809-SS-LV-G-LED-04-G
VARIRONIX
STN - Super-Twisted Nematic
Transflective
8 × 1
5 × 8 Dots
6.45 mm × 10.75 mm
LED Backlighting - Green
61mm × 15.8mm
-5°C to +50°C
5 V
14
13
12
11
5
4
6
DB7
DB6
DB5
DB4
R / ~W (Read / ~Write)
RS (Register Select)
E (Enable)
LCD Pin Name
Table 2-4 on page
FPGA – LCD Interface
19.
Table
19
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