A3PE-BRD600-SKT Actel, A3PE-BRD600-SKT Datasheet - Page 25

• Manufacturer Part Number: A3PE-BRD600-SKT
• Description: MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
• Manufacturer: Actel

Specifications of A3PE-BRD600-SKT

• Processor To Be Evaluated: ProASIC3/E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Description of Test Design
ProASIC3/E Starter Kit User’s Guide and Tutorial
This description of the test design is provided with the Starter Kit. This design contains a data generator block for
LEDs, clock divider, and an LCD display block. A block diagram of the design is shown in
The clock divider divides the 40 MHz oscillator clock and sends the divided clock to the LCD module and the counter.
The data generator (Data_Block) generates an eight-bit up-down counter and eight-bit flashing signal. The data
generator output is displayed on the ProASIC3E demo board LEDs. You can switch between the data using the SW6
signal. The counter has a synchronous load and an asynchronous clear.
A block diagram of the Data_Block is shown in
HexA[3:0]
HexA[3:0]
SW4
SW5
CLK
SW1
SW2
SW3
SW6
Data_select
HexA[3:0]
HexB[3:0]
Updown
Sload
Aclr
Clock
CLK
ACLR
CLK_DIVIDER_instance
CLK_DIVIDER
DIVIDED_CLK2
DIVIDED_CLK1
LED_Flashing_instance
Clock
Aclr
Figure 4-1. Design Block Diagram
Clock
Updown
LED_Flashing
Sload
Data[7:0]
CLK
Aclr
Figure 4-2. Data Block Diagram
Aclr
SW7_count
count8_instance
clk_internal_c
count8
Figure
Q
0
1
Q[7:0]
4-2.
clk
reset
Clock
Data_select
HexA[3:0]
HexB[3:0]
Updown
Aclr
Sload
Data_Block_instance
lcd_instance
B[7:0]
S
A[7:0]
Data_Block
DATA_MUX
mux2A[7:0]
lcd_data[1:4]
DATA_LED[7:0]
lcd
lcd-enable
lcd_rw
lcd_rs
Y[7:0]
DATA_LCD[7:4]
DATA_LED[7:0]
R_nW_LCD
RS_LCD
1
1
1
0
0
0
0
1
Figure
DATA_LCD[7:4]
R_nW_LCD
EN_LCD
RS_LCD
LED[7:0]
4-1.
4
25