PACPOWR1208P1-EV Lattice, PACPOWR1208P1-EV Datasheet

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PACPOWR1208P1-EV

Manufacturer Part Number
PACPOWR1208P1-EV
Description
MCU, MPU & DSP Development Tools PAC1208P1 Eval Board
Manufacturer
Lattice
Datasheet

Specifications of PACPOWR1208P1-EV

Processor To Be Evaluated
ispPAC-POWR1208P2
Interface Type
JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ispPAC-POWR1208P1 Evaluation Board
PAC-POWR1208P1-EV
March 2007
Application Note AN6059
Introduction
®
The Lattice Semiconductor ispPAC
-POWR1208P1 In-System-Programmable Analog Circuit allows designers to
implement both the analog and digital functions of a power supply monitoring and sequencing subsystem within a
single integrated circuit. By integrating analog functions such as comparators and programmable slew rate FET
drivers with the digital functionality of a Programmable Logic Device (PLD), the ispPAC-POWR1208P1 provides the
power-supply designer with a rich set of features in a single device.
ISP™ (In-System-Programmability) provides the designer with an unprecedented level of flexibility, allowing him to
configure analog parameters such as threshold voltages as well as defining state machines and combinatorial logic
2
®
functions. All configuration data is stored internally in E
CMOS
nonvolatile memory. Programming a configuration
is accomplished through an industry-standard JTAG IEEE 1149.1 interface.
PAC-POWR1208P1-EV Evaluation Board
The PAC-POWR1208P1-EV evaluation board (Figure 1) allows the designer to quickly configure and evaluate the
ispPAC-POWR1208P1 on a fully assembled printed-circuit board. The double-sided board supports a 44-pin TQFP
package, a header for user I/O, a JTAG programming cable connector, and an uncommitted pad array for user pro-
®
totyping. JTAG programming signals can be generated by using an ispDOWNLOAD
programming cable con-
nected between the evaluation board and a PC’s parallel (printer) port. Both analog and digital features of the
®
ispPAC-POWR1208P1 can be easily configured using PAC-Designer
software.
Figure 1. PAC-POWR1208P1-EV Evaluation Board
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
1
an6059_01.1

Related parts for PACPOWR1208P1-EV

PACPOWR1208P1-EV Summary of contents

Page 1

... Figure 1. PAC-POWR1208P1-EV Evaluation Board © 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...

Page 2

... TCK GND Programming Interface Lattice Semiconductor’s ispDOWNLOAD tion board. This cable plugs into a PC-compatible’s parallel port connector, and includes active buffer circuitry inside its DB-25 connector housing. The other end of the ispDOWNLOAD cable terminates in an 8-pin 0.100” pitch header connector which plugs directly into a mating connector provided on the PAC-POWR1208P1-EV evaluation board ...

Page 3

... Lattice Semiconductor pins independent of the values of VDD and VDDINP. For device programming, however, VDD must be set between 3.0 and 5.5V. On the evaluation board, VDD and VDDINP are normally connected together with a user-removable jumper (J7.5). This jumper can be removed to allow for independent VDD and VDDINP supplies. ...

Page 4

... Lattice Semiconductor • Selects whether open-drain digital outputs OUT5-OUT8 are pulled up to VDD (upper position), VDDINP (lower position), or not pulled up at all. These outputs are pulled up through 2K Ω resistors. Controls and Indicators A reset switch is provided on the evaluation board which pulls the RESET input pin low when it is depressed, re-ini- tializing the ispPAC-POWR1208P1 ...

Page 5

... Lattice Semiconductor Figure 5. Top-side Foil Figure 6. Bottom-side Foil ispPAC-POWR1208P1 Evaluation Board PAC-POWR1208P1-EV 5 ...

Page 6

... Red banana jack Black banana jack 470 ohm SIP-8 resnet, 7-resistor SIP, bussed type 10K resistor 2K 5% resistor Pushbutton switch T1-3/4 green LED ispPAC-POWR1208P1 Ordering Part Number PACPOWR1208P1-EV PAC-SYSPOWR1208P1 Version 01.0 Previous Lattice releases. 01.1 Added Ordering Information section. 6 PAC-POWR1208P1-EV Description ...

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