25LC128XT-I/ST Microchip Technology, 25LC128XT-I/ST Datasheet
25LC128XT-I/ST
Specifications of 25LC128XT-I/ST
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25LC128XT-I/ST Summary of contents
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... Page Size Temp. Ranges 64 Byte I,E 64 Byte I Description The Microchip Technology Inc. 25AA128/25LC128 * (25XX128 ) are 128k-bit Serial Electrically Erasable PROMs. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus sep- arate data in (SI) and data out (SO) lines ...
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... 2.5V to 5.5V CC Test Conditions ≥ 2.7V < 2. 1.0 mA, V < 2. -400 μ OUT 5.0V (Note) = 5.5V 10.0 MHz; CLK = 2.5V 5.0 MHz; CLK = 5.5V = 2.5V = 5.5V, Inputs tied 125°C = 5.5V, Inputs tied 85°C © 2009 Microchip Technology Inc. ...
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... This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site: www.microchip.com. © 2009 Microchip Technology Inc. 25AA128/25LC128 Industrial (I -40°C to +85°C ...
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... Vcc ≤ 5.5V 30 — ns 2.5V ≤ Vcc < 4.5V 60 — ns 1.8V ≤ Vcc < 2.5V 160 — ns — 1,000,000 — E/W Page Mode, 25°C, V Cycles — (Note 1) (Note 2) — 1. 2.5V to 5.5V CC Test Conditions 2) OTE = 5. OTE © 2009 Microchip Technology Inc. ...
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... SI HOLD FIGURE 1-2: SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI © 2009 Microchip Technology Inc. 25AA128/25LC128 High-Impedance n Don’t Care High-Impedance 14 Don’t Care LSB in 3 Mode 1,1 ...
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... WPEN, WIP, WEL, BP1 and BP0 bits (Figure 2-6). A read attempt of a memory array location will not be possible during a write cycle. When the write cycle is completed, the write enable latch is reset. © 2009 Microchip Technology Inc. ...
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... Instruction High-Impedance SO © 2009 Microchip Technology Inc. 25AA128/25LC128 HV Generator EEPROM Array Page Latches Y Decoder Sense Amp. R/W Control Read data from memory array beginning at selected address Write data to memory array beginning at selected address Reset the write enable latch (disable write operations) ...
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... FIGURE 2-2: BYTE WRITE SEQUENCE SCK Instruction High-Impedance SO FIGURE 2-3: PAGE WRITE SEQUENCE SCK Instruction SCK Data Byte DS21831D-page 16-bit Address 16-bit Address Data Byte Twc Data Byte Data Byte Data Byte n (64 max © 2009 Microchip Technology Inc. ...
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... SI SO FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI) CS SCK SI SO © 2009 Microchip Technology Inc. 25AA128/25LC128 The following is a list of conditions under which the write enable latch will be reset: • Power-up See • WRDI instruction successfully executed • WRSR instruction successfully executed • ...
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... These bits 1 0 are set by the user issuing the WRSR instruction. These R R bits are nonvolatile, and are shown in Table 2-3. WEL WIP See Figure 2-6 for the RDSR timing sequence. ’, no write Data from STATUS Register © 2009 Microchip Technology Inc. ...
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... Instruction Note: An internal write cycle (T WC © 2009 Microchip Technology Inc. 25AA128/25LC128 only writes to nonvolatile bits in the STATUS register are disabled. See Table 2-4 for a matrix of functionality on the WPEN bit. See Figure 2-7 for the WRSR timing sequence. TABLE 2-3: BP1 0 0 ...
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... The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to enter active state Protected Blocks Unprotected Blocks Protected x Protected x Protected Protected STATUS Register Protected Protected Writable Writable Writable Protected Writable Writable © 2009 Microchip Technology Inc. ...
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... STATUS register write sequence will dis- able writing to the STATUS register internal write cycle has already begun, WP going low will have no effect on the write. © 2009 Microchip Technology Inc. 25AA128/25LC128 The WP pin function is blocked when the WPEN bit in the STATUS register is low. This allows the user to install the 25XX128 in a system with WP pin grounded and still be able to write to the STATUS register ...
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... DS21831D-page 14 : Example 25LC128 I/MF 0328 1L7 Example: 25AA128 I/P 1L7 0328 Example: 25LC128 I/SN 0328 1L7 Example: TSSOP 1st Line Marking 5LD Device I328 1L7 25AA128 25AA128X 25LC128 25LC128X © 2009 Microchip Technology Inc. std mark 5AD 5ADX 5LD 5LDX ...
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... Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2009 Microchip Technology Inc. 25AA128/25LC128 ...
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... E .290 E1 .240 D .348 .365 L .115 c .008 b1 .040 .060 b .014 .018 eB – c MAX 8 – .210 .130 .195 – – .310 .325 .250 .280 .400 .130 .150 .010 .015 .070 .022 – .430 Microchip Technology Drawing C04-018B © 2009 Microchip Technology Inc. ...
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... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2009 Microchip Technology Inc. 25AA128/25LC128 D e ...
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... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2009 Microchip Technology Inc. 25AA128/25LC128 D E ...
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... Replaced Package drawings (Rev. AP); Replaced On- Line Support; Revised Product ID section. Revision D (06/09) Added X-Rotated TSSOP to package types; Revised Table 1-2, Param. 21; Revised Table 3-1; Revised TSSOP Line Marking table; Added SOIC Land Pattern; Revised Product ID section. DS21831D-page 20 © 2009 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2009 Microchip Technology Inc. 25AA128/25LC128 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21831D-page 22 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS21831D © 2009 Microchip Technology Inc. ...
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... EEPROM, Industrial temp., Tape & Reel, TSSOP package 25LC128-I/P = 128k-bit, 2.5V Serial EEPROM, Industrial temp., P-DIP package 25LC128T-E/MF = 128k-bit, 2.5V Serial EEPROM, Extended temp., Tape & Reel, DFN package 25LC128XT-I/ST = 128k-bit, 2.5V Serial EEPROM, Industrial temp., Tape & Reel, Rotated pinout, TSSOP package DS21831D-page 23 ...
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... NOTES: DS21831D-page 24 © 2009 Microchip Technology Inc. ...
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... PICDEM, PICDEM.net, PICtail, PIC Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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