AD1555AP Analog Devices Inc, AD1555AP Datasheet

IC,Converter, Other/Special/Miscellaneous,BICMOS,LDCC,28PIN

AD1555AP

Manufacturer Part Number
AD1555AP
Description
IC,Converter, Other/Special/Miscellaneous,BICMOS,LDCC,28PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD1555AP

Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
256k
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
96W
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-LCC (J-Lead)
For Use With
EVAL-AD1555/56EB - BOARD EVAL FOR AD1555/56
Lead Free Status / RoHS Status

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a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD1555 is a complete sigma-delta modulator, combined
with a programmable gain amplifier intended for low frequency,
REV. B
AIN (+)
AIN (–)
TIN (+)
TIN (–)
FEATURES
AD1555
AD1556
APPLICATIONS
Seismic Data Acquisition Systems
Chromatography
Automatic Test Equipment
Fourth Order - Modulator
Large Dynamic Range
Low Input Noise: 80 nV rms @ 4 ms with
Low Distortion: –111 dB Max, –120 dB Typical
Low Intermodulation: 122 dB
Sampling Rate at 256 kSPS
Very High Jitter Tolerance
No External Antialias Filter Required
Programmable Gain Front End
Input Range:
Robust Inputs
Gain Settings: 1, 2.5, 8.5, 34, 128
Common-Mode Rejection (DC to 1 kHz)
77 mW Typical Low Power Dissipation
Standby Modes
FIR Digital Filter/Decimator
Serial or Parallel Selection of Configuration
Output Word Rates: 250 SPS to 16 kSPS
6.2 mW Typ Low Power Dissipation
70 W in Standby Mode
Reference Design and Evaluation Board with
116 dB Min, 120 dB Typical @ 1 ms
117 dB Typical @ 0.5 ms
Gain of 34,128
93 dB Min, 101 dB Typical @ Gain of 1
Software Available
AGND1
MUX
PGA
REFIN
PGAOUT
2.25 V
REF DIVIDER
REFCAP2
MODIN
AGND2
REFCAP1
DAC
AD1555
+V
FILTER
LOOP
A
AGND3
FUNCTIONAL BLOCK DIAGRAM
–V
A
MODE CONTROL
OVERVOLTAGE
DETECTION
GENERATION
LOGIC
CLOCK
V
L
DGND
high dynamic range measurement applications. The AD1555
outputs a ones-density bitstream proportional to the analog
input. When used in conjunction with the AD1556 digital filter/
decimator, a high performance ADC is realized.
The continuous-time analog modulator input architecture avoids
the need for an external antialias filter. The programmable gain
front end simplifies system design, extends the dynamic range,
and reduces the system board area. Low operating power and
standby modes makes the AD1555 ideal for remote battery-pow-
ered data acquisition systems.
The AD1555 is fabricated on Analog Devices’ BiCMOS process
that has high performance bipolar devices along with CMOS
transistors. The AD1555 and AD1556 are packaged, respectively,
in 28-lead PLCC and 44-lead MQFP packages and are specified
from –55°C to +85°C (AD1556 and AD1555 B Grade) and from
0°C to 85°C (AD1555 A Grade).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
CB0...CB4
MDATA
MFLG
MCLK
Figure 1. FFT Plot, Full-Scale AIN Input, Gain of 1
TDATA
CSEL
–100
–120
–140
–160
–180
–200
–20
–40
–60
–80
0
0
PGA0...PGA4
50
CONTROL
CLKIN SYNC
CLOCK DIVIDER
INPUT
PGA
MUX
100
150
with Low Noise PGA
CONFIGURATION
BW0...BW2 RESET PWRDN GND V
H/S
AD1555/AD1556
FREQUENCY – Hz
DIGITAL
200
FILTER
REGISTER
24-Bit - ADC
250
REGISTER
REGISTER
STATUS
DATA
300
ERROR
© Analog Devices, Inc., 2002
AD1556
350
INPUT SHIFT
REGISTER
f
SNR = 116.7dB
THD = –120.6dB
IN
OUTPUT
= 24.4Hz
DATA
400
MUX
www.analog.com
450
L
500
DIN
SCLK
CS
R/W
DOUT
DRDY
RSEL

Related parts for AD1555AP

AD1555AP Summary of contents

Page 1

FEATURES AD1555 Fourth Order - Modulator Large Dynamic Range 116 dB Min, 120 dB Typical @ 1 ms 117 dB Typical @ 0.5 ms Low Input Noise rms @ 4 ms with Gain of 34,128 Low Distortion: ...

Page 2

... –55 MIN MAX 2.990 –0.3 2.0 –10 – SINK = –2 mA 2.4 SOURCE –2– AGND = DGND = 0 V; MCLK = 256 kHz AD1555AP Typ Max Min Typ Max 120 116 120 119.5 115.5 119.5 117.5 114 117.5 109.5 104.5 109 –120 – ...

Page 3

... AD1556 output word rate, the inverse of the sampling rate. See Tables I, Ia, Ib for other output 2. 5.25 V; CLKIN = 1.024 MHz Notes All Filters Except F =16 kHz O F =16 kHz SINK I = –2 mA SOURCE kHz Power-Down Mode –3– AD1555/AD1556 AD1555AP Max Min Typ Max 5.25 4.75 5 5.25 –4.75 –5.25 –5 –4.75 5.25 4. 9 ...

Page 4

... kHz (1/2 ms) O 1.59 µV rms kHz (1 ms) O 1.13 µV rms F = 500 250 Hz (4 ms) 797 nV rms O Table Ia. Minimum Dynamic Performances (AD1555AP Only) Input and Gain MODIN kHz (1 ms) 116 500 Hz (2 ms) 119 250 Hz (4 ms) 122 O * Not tested in production. Guaranteed by design. ...

Page 5

TIMING SPECIFICATIONS 1 CLKIN Frequency CLKIN Duty Cycle Error 1 MCLK Output Frequency SYNC Setup Time SYNC Hold Time CLKIN Rising to MCLK Output Falling on SYNC CLKIN Falling to MCLK Output Rising CLKIN Falling to MCLK Output Falling MCLK ...

Page 6

AD1555/AD1556 CLKIN t 1 SYNC t 3 MCLK ( MDATA TDATA t 10 RESET CLKIN SYNC DRDY ERROR Figure 4. AD1556 RESET, DRDY, and Overwrite Timings DATA VALID ...

Page 7

RSEL DRDY R DOUT SCLK R SCLK t 31 MSB DIN REV. B MSB MSB– ...

Page 8

... Ground Voltage Differences DGND, AGND1, AGND2, AGND3 . . . . . . . . . . . ± 0.3 V Digital Inputs . . . . . . . . . . . . . . . . . . . . –0 Internal Power Dissipation AD1555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 W AD1556 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 W Model AD1555AP AD1555APRL AD1555BP AD1555BPRL AD1556AS AD1556ASRL EVAL-AD1555/AD1556EB AD1555/56-REF *Contact factory for extended temperature range. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...

Page 9

REV. B PIN CONFIGURATION 28-Lead PLCC (P-28A PIN 1 AIN(+) 5 25 AIN(– TIN(+) AD1555 TIN(– TOP VIEW (Not to Scale CB0 10 20 ...

Page 10

AD1555/AD1556 Pin No. Mnemonic Description 1 AGND1 Analog Ground 2 PGAOUT Programmable Gain Amplifier Output. The output of the on-chip programmable gain amplifier is available at this pin. Refer to Table III for PGA gain settings selection ...

Page 11

AD1556 PIN FUNCTION DESCRIPTIONS (continued) Pin No. Mnemonic Description 14 DOUT Serial Data Output. DOUT is used to access the conversion results or the contents of the Status Register, depending on the logic state of the RSEL pin. At the ...

Page 12

AD1555/AD1556 TERMINOLOGY DYNAMIC RANGE Dynamic range is the ratio of the rms value of the full scale to the total rms noise measured with the inputs shorted together in the bandwidth from the Nyquist frequency F value ...

Page 13

FREQUENCY – Hz TPC 1. FFT (2048 Points) Full-Scale MODIN Input 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 –200 ...

Page 14

AD1555/AD1556 –128 –120 –113 –105 CMRR – dB TPC 7. Common-Mode Rejection Distribution (272 Units) 120 G = 8.5 115 110 105 G = 128 G ...

Page 15

FREQUENCY – Hz TPC 13. AD1556 Pass Band Ripple, F 0.20 0.15 0.10 0.05 0.00 –0.05 –0.10 –0.15 –0.20 0 1000 2000 FREQUENCY – Hz TPC 14. AD1556 ...

Page 16

AD1555/AD1556 CIRCUIT DESCRIPTION The AD1555/AD1556 chipset is a complete sigma-delta 24-bit A/D converter with very high dynamic range intended for the measurement of low frequency signals few kHz such as those in seismic applications. The AD1555 contains ...

Page 17

AIN are specifi- cally designed to ease the design. The external voltage spike is generally clamped by devices T1 and T2 at about hundred volts (for instance, devices T1 and T2 can be ...

Page 18

AD1555/AD1556 When the V input is selected, S4(+) and S4(–) are closed, all REF the other switches are opened, and a reference voltage (2.25 V) equal to half of the full-scale range is sampled. In this combina- tion, the gain ...

Page 19

DIGITAL FILTERING The AD1556 is a digital finite impulse response (FIR) linear phase low pass filter and serves as the decimation filter for the AD1555. It takes the output bitstream of the AD1555, filters and decimates user-selectable ...

Page 20

AD1555/AD1556 RESET Operation The RESET pin initializes the AD1556 in a known state. RESET is active on the next CLKIN rising edge after the RESET input is brought high as shown in Figure 4. The reset value of each bit ...

Page 21

DRDYBUF = 0 DRDYBUF = THE MICROPROCESSOR DRDY AD1556 AD1556 V DGND L AD1556 Figure 11. DRDY Output Pin Configuration Analog Input and Digital Output Data Format When operating with a nominal MCLK frequency ...

Page 22

AD1555/AD1556 Bit Number Name DB23 (MSB) ERROR DB22 OVWR DB21 MFLG DB20 X DB19 ACC DB18 DRDY DB17 FLSTL DB16 DRNG DB15 X DB14 X DB13 X DB12 X DB11 PWRDN DB10 CSEL DB9 X DB8 BW2 DB7 BW1 DB6 ...

Page 23

REV. B OUTLINE DIMENSIONS Dimensions shown in inches and (mm) 28-Lead PLCC (P-28A) 0.180 (4.57) 0.165 (4.19) 0.048 (1.21) 0.056 (1.42) 0.042 (1.07) 0.042 (1.07 PIN 1 IDENTIFIER 0.050 TOP VIEW (1.27) ...

Page 24

–24– ...

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