IC,D/A CONVERTER,DUAL,10-BIT,CMOS,TSSOP,24PIN

AD5333BRUZ-REEL

Manufacturer Part NumberAD5333BRUZ-REEL
DescriptionIC,D/A CONVERTER,DUAL,10-BIT,CMOS,TSSOP,24PIN
ManufacturerAnalog Devices Inc
AD5333BRUZ-REEL datasheet
 


Specifications of AD5333BRUZ-REEL

Settling Time7µsNumber Of Bits10
Data InterfaceParallelNumber Of Converters2
Voltage Supply SourceSingle SupplyPower Dissipation (max)2.25mW
Operating Temperature-40°C ~ 105°CMounting TypeSurface Mount
Package / Case24-TSSOPLead Free Status / RoHS StatusLead free / RoHS Compliant
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FEATURES
AD5332: Dual 8-Bit DAC in 20-Lead TSSOP
AD5333: Dual 10-Bit DAC in 24-Lead TSSOP
AD5342: Dual 12-Bit DAC in 28-Lead TSSOP
AD5343: Dual 12-Bit DAC in 20-Lead TSSOP
Low Power Operation: 230 A @ 3 V, 300 A @ 5 V
via PD Pin
Power-Down to 80 nA @ 3 V, 200 nA @ 5 V
2.5 V to 5.5 V Power Supply
Double-Buffered Input Logic
Guaranteed Monotonic by Design Over All Codes
Buffered/Unbuffered Reference Input Options
Output Range: 0–V
or 0–2 V
REF
REF
Power-On Reset to Zero Volts
Simultaneous Update of DAC Outputs via LDAC Pin
Asynchronous CLR Facility
Low Power Parallel Data Interface
On-Chip Rail-to-Rail Output Buffer Amplifiers
Temperature Range: –40 C to +105 C
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Control
DB
.
7
.
.
DB
0
INTER-
FACE
LOGIC
CS
WR
A0
CLR
LDAC
*Protected by U.S. Patent Number 5,969,657; other patents pending.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
2.5 V to 5.5 V, 230 A, Parallel Interface
Dual Voltage-Output 8-/10-/12-Bit DACs
AD5332/AD5333/AD5342/AD5343*
GENERAL DESCRIPTION
The AD5332/AD5333/AD5342/AD5343 are dual 8-, 10-, and
12-bit DACs. They operate from a 2.5 V to 5.5 V supply con-
suming just 230 µA at 3 V, and feature a power-down pin, PD
that further reduces the current to 80 nA. These devices incor-
porate an on-chip output buffer that can drive the output to
both supply rails, while the AD5333 and AD5342 allow a choice
of buffered or unbuffered reference input.
The AD5332/AD5333/AD5342/AD5343 have a parallel interface.
CS selects the device and data is loaded into the input registers
on the rising edge of WR.
The GAIN pin on the AD5333 and AD5342 allows the output
range to be set at 0 V to V
Input data to the DACs is double-buffered, allowing simultaneous
update of multiple DACs in a system using the LDAC pin.
An asynchronous CLR input is also provided, which resets the
contents of the Input Register and the DAC Register to all zeros.
These devices also incorporate a power-on reset circuit that ensures
that the DAC output powers on to 0 V and remains there until
valid data is written to the device.
The AD5332/AD5333/AD5342/AD5343 are available in Thin
Shrink Small Outline Packages (TSSOP).
AD5332 FUNCTIONAL BLOCK DIAGRAM
(Other Diagrams Inside)
V
A
REF
POWER-ON
RESET
DAC
INPUT
8-BIT
REGISTER
REGISTER
DAC
DAC
INPUT
8-BIT
REGISTER
REGISTER
DAC
RESET
V
B
REF
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
or 0 V to 2 × V
.
REF
REF
V
DD
AD5332
V
A
BUFFER
OUT
BUFFER
V
B
OUT
POWER-DOWN
LOGIC
PD
GND
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2000

AD5333BRUZ-REEL Summary of contents

  • Page 1

    FEATURES AD5332: Dual 8-Bit DAC in 20-Lead TSSOP AD5333: Dual 10-Bit DAC in 24-Lead TSSOP AD5342: Dual 12-Bit DAC in 28-Lead TSSOP AD5343: Dual 12-Bit DAC in 20-Lead TSSOP Low Power Operation: 230 300 A ...

  • Page 2

    AD5332/AD5333/AD5342/AD5343–SPECIFICATIONS ( REF L 1 Parameter Min PERFORMANCE AD5332 Resolution Relative Accuracy Differential Nonlinearity AD5333 Resolution Relative Accuracy Differential Nonlinearity AD5342/AD5343 Resolution ...

  • Page 3

    CHARACTERISTICS otherwise noted.) 2 Parameter Output Voltage Settling Time AD5332 AD5333 AD5342 AD5343 Slew Rate Major Code Transition Glitch Energy Digital Feedthrough Digital Crosstalk Analog Crosstalk DAC-to-DAC Crosstalk Multiplying Bandwidth Total Harmonic Distortion NOTES 1 Guaranteed ...

  • Page 4

    AD5332/AD5333/AD5342/AD5343 ABSOLUTE MAXIMUM RATINGS 25°C unless otherwise noted GND . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 5

    AD5332 FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET DAC INPUT REGISTER REGISTER . . DB 0 INTER- FACE LOGIC CS DAC INPUT REGISTER REGISTER WR A0 RESET CLR LDAC Pin No. Mnemonic Function Unbuffered reference input ...

  • Page 6

    AD5332/AD5333/AD5342/AD5343 AD5333 FUNCTIONAL BLOCK DIAGRAM POWER-ON DAC RESET REGISTER BUF GAIN INPUT REGISTER INTER- FACE LOGIC CS INPUT REGISTER WR DAC A0 REGISTER RESET CLR LDAC Pin No. Mnemonic Function 1 GAIN Gain ...

  • Page 7

    AD5342 FUNCTIONAL BLOCK DIAGRAM POWER-ON DAC RESET REGISTER INPUT REGISTER INTER- FACE LOGIC CS INPUT REGISTER WR DAC A0 REGISTER RESET CLR LDAC Pin No. Mnemonic Function 1 GAIN Gain Control Pin. This ...

  • Page 8

    AD5332/AD5333/AD5342/AD5343 AD5343 FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET HIGH BYTE REGISTER LOW BYTE DB REGISTER 0 HBEN INTER- HIGH BYTE CS FACE REGISTER LOGIC WR LOW BYTE REGISTER A0 RESET CLR LDAC Pin ...

  • Page 9

    TERMINOLOGY RELATIVE ACCURACY For the DAC, Relative Accuracy or Integral Nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the actual endpoints of the DAC transfer function. Typical INL versus Code plot ...

  • Page 10

    AD5332/AD5333/AD5342/AD5343 OFFSET ERROR DRIFT This is a measure of the change in Offset Error with changes in temperature expressed in (ppm of full-scale range)/°C. GAIN ERROR DRIFT This is a measure of the change in Gain Error with ...

  • Page 11

    Typical Performance Characteristics– 1 0.5 0 –0.5 –1.0 50 100 150 200 250 0 CODE Figure 5. AD5332 Typical INL Plot 0 ...

  • Page 12

    AD5332/AD5333/AD5342/AD5343 0 0 REF 0 GAIN ERROR –0.1 –0.2 –0.3 –0.4 OFFSET ERROR –0.5 –0 – Volts DD Figure 14. Offset Error and Gain ...

  • Page 13

    100 150 200 250 300 350 400 I – Figure 23. I Histogram with and 0 ...

  • Page 14

    AD5332/AD5333/AD5342/AD5343 Resistor String The resistor string section is shown in Figure 29 simply a string of resistors, each of value R. The digital code loaded to the DAC register determines at what node on the string the voltage ...

  • Page 15

    High-Byte Enable Input (HBEN) High-Byte Enable is a control input on the AD5343 only that determines if data is written to the high-byte input register or the low-byte input register. The low data byte of the AD5343 consists of data ...

  • Page 16

    AD5332/AD5333/AD5342/AD5343 SUGGESTED DATABUS FORMATS In most applications GAIN and BUF are hard-wired. However, if more flexibility is required, they can be included in a databus. This enables you to software program GAIN, giving the option of doubling the resolution in ...

  • Page 17

    Decoding Multiple AD5332/AD5333/AD5342/AD5343 The CS pin on these devices can be used in applications to decode a number of DACs. In this application, all DACs in the system receive the same data and WR pulses, but only the CS to ...

  • Page 18

    AD5332/AD5333/AD5342/AD5343 Coarse and Fine Adjustment Using the AD5332/AD5333/ AD5342/AD5343 The DACs in the AD5332/AD5333/AD5342/AD5343 can be paired together to form a coarse and fine adjustment function, as shown in Figure 39. DAC A is used to provide the coarse adjustment ...

  • Page 19

    Part No. Resolution DNL V SINGLES ± 0.25 AD5330 8 1 ± 0.5 AD5331 10 1 ± 1.0 AD5340 12 1 ± 1.0 AD5341 12 1 DUALS ± 0.25 AD5332 8 2 ± 0.5 AD5333 10 2 ± 1.0 AD5342 ...

  • Page 20

    AD5332/AD5333/AD5342/AD5343 PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Thin Shrink Small Outline Package TSSOP (RU-20) 0.260 ...