AD5336BRU-REEL7 Analog Devices Inc, AD5336BRU-REEL7 Datasheet - Page 5

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AD5336BRU-REEL7

Manufacturer Part Number
AD5336BRU-REEL7
Description
IC,D/A CONVERTER,QUAD,10-BIT,CMOS,TSSOP,28PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5336BRU-REEL7

Rohs Status
RoHS non-compliant
Settling Time
7µs
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
4
Voltage Supply Source
Single Supply
Power Dissipation (max)
4.5mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Lead Free Status / RoHS Status
LDAC
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15–22
23
24
REV. 0
GAIN
CLR
DB
DB
WR
CS
A0
A1
.
. .
7
0
INTER-
LOGIC
Mnemonic
V
V
V
V
V
V
GND
CS
WR
A0
A1
LDAC
PD
V
DB
GAIN
CLR
FACE
REF
REF
OUT
OUT
OUT
OUT
DD
0
–DB
C/D
A/B
A
B
C
D
AD5334 FUNCTIONAL BLOCK DIAGRAM
7
POWER-ON
REGISTER
REGISTER
REGISTER
REGISTER
RESET
INPUT
INPUT
INPUT
INPUT
Function
Unbuffered Reference Input for DACs C and D.
Unbuffered Reference Input for DACs A and B.
Output of DAC A. Buffered Output with Rail-to-Rail Operation.
Output of DAC B. Buffered Output with Rail-to-Rail Operation.
Output of DAC C. Buffered Output with Rail-to-Rail Operation.
Output of DAC D. Buffered Output with Rail-to-Rail Operation.
Ground Reference Point for All Circuitry on the Part.
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
LSB Address Pin for Selecting which DAC Is to Be Written to.
MSB Address Pin for Selecting which DAC Is to Be Written to.
Active Low Control Input that Updates the DAC Registers with the Contents of the Input Registers.
This allows all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. This part can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 µF capacitor in parallel with a 0.1 µF capacitor to GND.
Eight Parallel Data Inputs. DB
Gain Control Pin. This controls whether the output range from the DAC is 0–V
Asynchronous Active Low Control Input that Clears All Input Registers and DAC Registers to Zeros.
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
8-BIT
DAC
8-BIT
8-BIT
8-BIT
8-BIT
DAC
DAC
DAC
DAC
AD5334 PIN FUNCTION DESCRIPTIONS
V
V
REF
REF
A/B
C/D
BUFFER
BUFFER
BUFFER
BUFFER
AND BUFFERS
TO ALL DACS
7
is the MSB of these eight bits.
AD5334
POWER-DOWN
–5–
V
DD
LOGIC
PD
GND
AD5334/AD5335/AD5336/AD5344
V
V
V
V
OUT
OUT
OUT
OUT
A
B
C
D
AD5334 PIN CONFIGURATION
V
V
REF
REF
V
V
V
V
LDAC
OUT
OUT
OUT
OUT
GND
C/D
A/B
WR
CS
A0
A1
A
B
C
D
10
11
12
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD5334
8-BIT
REF
or 0–2 V
24
23
22
21
20
19
18
17
16
15
14
13
CLR
GAIN
DB
DB
DB
DB
DB
DB
DB
DB
V
PD
DD
7
6
5
4
3
2
1
0
REF

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