AD6645ASVZ-105 Analog Devices Inc, AD6645ASVZ-105 Datasheet
AD6645ASVZ-105
Specifications of AD6645ASVZ-105
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AD6645ASVZ-105 Summary of contents
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FEATURES SNR = 75 dB MHz 105 MSPS IN SNR = 72 dB, f 200 MHz 105 MSPS IN SFDR = 89 dBc MHz 105 MSPS IN 100 dBFS multitone ...
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AD6645 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 DC Specifications ......................................................................... 3 Digital Specifications ................................................................... 4 AC Specifications ...
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SPECIFICATIONS DC SPECIFICATIONS 3 and MIN MAX Table 1. Parameter Temp RESOLUTION ACCURACY No Missing Codes Full Offset Error Full Gain Error Full Differential Nonlinearity (DNL) Full Integral Nonlinearity ...
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AD6645 DIGITAL SPECIFICATIONS 3 and MIN MAX Table 2. Parameter ENCODE INPUTS (ENCODE, ENCODE) 1 Differential Input Voltage Differential Input Resistance Differential Input Capacitance LOGIC OUTPUTS (D13 to D0, ...
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Parameter WORST HARMONIC (FOURTH OR HIGHER) Analog Input @ −1 dBFS TWO-TONE SFDR 2, 3 TWO-TONE IMD REJECTION F1 −7 dBFS ANALOG INPUT BANDWIDTH 1 Analog input signal power swept from −10 dBFS to −100 dBFS ...
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AD6645 Parameter DATA-READY (DRY 4 )/DATA(D13:0),, OVR Data-Ready to DATA Delay (Hold Time) 50% Duty Cycle Data-Ready to DATA Delay (Setup Time) 50% Duty Cycle APERTURE DELAY APERTURE UNCERTAINTY (JITTER) 1 Several timing parameters are a function of t ENC ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE The heat sink of the AD6645ASVZ, 52-lead TQFP_EP (SV-52-1) package must be soldered to the PCB GND plane to meet thermal specifications. Table 6. Thermal Characteristics Package Type ...
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AD6645 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ENCODE ENCODE NOTES 1. DNC = DO NOT CONNECT. 2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO GND. Table 7. Pin Function Descriptions Pin Number Mnemonic 1, 33 10, ...
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TYPICAL PERFORMANCE CHARACTERISTICS 0 ENCODE = 80MSPS –10 AIN = 2.2MHz @ –1dBFS SNR = 75.0dB –20 SFDR = 93.0dBc –30 –40 –50 –60 –70 –80 3 – –100 6 4 –110 –120 –130 ...
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AD6645 75.5 75 –40°C 74 +85°C 74 +25°C 73.5 73.0 72.5 ENCODE = 80MSPS @ AIN = –1dBFS TEMP = –40°C, +25°C, +85°C 72 FREQUENCY (MHz) Figure 10. Signal-to-Noise ...
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ENCODE = 80MSPS –10 AIN = 30.5MHz, 31.5MHz (–7dBFS) –20 NO DITHER –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 FREQUENCY (MHz) Figure 16. Two-Tone SFDR @ 30.5 MHz ...
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AD6645 0 ENCODE = 80.0MSPS –10 AIN = 30.5MHz @ –29.5dBFS NO DITHER –20 –30 –40 –50 –60 –70 –80 2 –90 6 –100 3 –110 5 –120 –130 FREQUENCY (MHz) Figure 22. 1 ...
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ENCODE = 76.8MSPS –10 AIN = 2W-CDMA @ 59.6MHz –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 FREQUENCY (MHz) Figure 28. Two W-CDMA Carriers @ 59.6 MHz, Encode = ...
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AD6645 EQUIVALENT CIRCUITS AIN BUF 500Ω BUF 500Ω AIN BUF V CL Figure 32. Analog Input Stage LOADS 10kΩ ENCODE 10kΩ LOADS Figure 33. Encode Inputs ...
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TERMINOLOGY Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the rising edge of ...
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AD6645 Spurious-Free Dynamic Range (SFDR) The ratio of the rms signal amplitude to the rms value of the peak spurious spectral component. The peak spurious component may or may not be a harmonic. May be reported in dBc (that is, ...
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THEORY OF OPERATION The AD6645 ADC employs a three-stage subrange architecture. This design approach achieves the required accuracy and speed while maintaining low power and small die size. As shown in the functional block diagram (see Figure 1), the AD6645 ...
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AD6645 This limits the amount of dynamic current from the A/D flowing back into the secondary of the transformer. The 50 Ω impedance matching can also be incorporated on the secondary side of the transformer, as shown in the evaluation ...
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LAYOUT INFORMATION The schematic of the evaluation board (see Figure 43) represents a typical implementation of the AD6645. A multi- layer board is recommended to achieve best results highly recommended that high quality, ceramic chip capacitors be used ...
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AD6645 Table 9. AD6645/PCB Bill of Materials Quantity Quantity 80 MSPS 105 MSPS Reference PCB 4 4 C1, C2, C31, C38 C10, C16, 1 C30 , C32 9 9 C4, C15, C22 ...
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Quantity Quantity 80 MSPS 105 MSPS Reference (U8 AC-coupled AIN is standard: R3, R4, R5, R8, and U3 are not installed. If dc-coupled AIN is required, ...
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AD6645 ...
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Figure 44. Top Signal Level Figure 45. 5.0 V Plane Layer 3 and 3.3 V Plane Layer 4 Figure 46. Ground Plane Layer 2 and Ground Plane Layer 5 Figure 47. Bottom Signal Layer Rev Page 23 of ...
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... AD6645ASVZ-80 −40°C to +85°C AD6645ASQ-105 −10°C to +85°C 1 AD6645ASQZ-105 −10°C to +85°C 1 AD6645ASVZ-105 −10°C to +85°C 1 AD6645-80/PCBZ 1 AD6645-105/PCBZ RoHS Compliant Part. ©2002–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...