AD6657BBCZ Analog Devices Inc, AD6657BBCZ Datasheet
AD6657BBCZ
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AD6657BBCZ Summary of contents
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FEATURES 11-bit, 200 MSPS output data rate per channel Integrated noise shaping requantizer (NSR) Performance with NSR enabled SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 ...
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AD6657 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications..................................................................................... 4 DC Specifications ......................................................................... 4 AC Specifications.......................................................................... 5 Digital Specifications ................................................................... 6 Switching ...
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GENERAL DESCRIPTION The AD6657 is an 11-bit, 200 MSPS, quad-channel intermediate frequency (IF) receiver specifically designed to support multi- antenna systems in telecommunication applications where high dynamic range performance, low power, and small size are desired. The device consists of ...
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AD6657 SPECIFICATIONS DC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless S otherwise noted. Table 1. Parameter RESOLUTION ACCURACY No ...
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AC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless S otherwise noted. Table 2. 1 Parameter SIGNAL-TO-NOISE-RATIO (SNR)—NSR DISABLED f ...
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AD6657 DIGITAL SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless S otherwise noted. Table 3. Parameter DIFFERENTIAL CLOCK INPUTS (CLK+, ...
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Parameter Input Resistance Input Capacitance 2 LOGIC INPUT (PDWN) High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Input Resistance Input Capacitance DIGITAL OUTPUTS (LVDS) Differential Output Voltage ( Output Offset ...
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AD6657 TIMING SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless S otherwise noted. Table 5. Parameter Description SYNC TIMING REQUIREMENTS ...
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ABSOLUTE MAXIMUM RATINGS Table 6. Parameter AVDD to AGND DRVDD to AGND VIN+x, VIN−x to AGND CLK+, CLK− to AGND SYNC to AGND VCMx to AGND CSB to AGND SCLK to AGND SDIO to AGND PDWN to AGND MODE to ...
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AD6657 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AGND VIN+C B AGND AGND C VIN+D AGND D VIN–D VCMD E AGND AVDD F AGND AGND G DRGND DRGND H DRVDD DRVDD J D0–CD D2–CD K D0+CD D2+CD L D1–CD ...
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Pin No. Mnemonic M7 D1+AB L7 D1−AB K8 D2+AB J8 D2−AB M8 D3+AB L8 D3−AB K9 D4+AB J9 D4−AB M9 D5+AB L9 D5−AB K10 D6+AB J10 D6−AB M10 D7+AB L10 D7−AB K11 D8+AB J11 D8−AB M11 D9+AB L11 D9−AB K12 ...
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AD6657 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 1.8 V, DRVDD = 1.8 V, sample rate = 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS, 32k sample, T otherwise noted SNR = 65.7dB (66.7dBFS) ...
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230.3MHz @ –1.6dBFS IN –20 NSR 33% BW MODE SNR = 69.3dB (71dBFS) (IN-BAND) SFDR = 85.4dBc (IN-BAND) –40 –60 THIRD –80 HARMONIC –100 –120 –140 ...
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AD6657 0 –20 SFDR (dBc) –40 IMD3 (dBc) –60 –80 SFDR (dBFS) –100 IMD3 (dBFS) –120 –90 –78 –66 –54 –42 INPUT AMPLITUDE (dBFS) Figure 17. Two-Tone SFDR/IMD3 vs. Input Amplitude (A with f = 169.1 MHz and f = ...
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EQUIVALENT CIRCUITS AVDD VIN Figure 22. Equivalent Analog Input Circuit AVDD AVDD 0.9V 15kΩ 15kΩ CLK+ Figure 23. Equivalent Clock Input Circuit DRVDD V+ V– DATAOUT– DATAOUT+ V– V+ Figure 24. Equivalent LVDS Output Circuit AVDD AVDD SYNC 16kΩ 0.9V ...
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AD6657 THEORY OF OPERATION ADC ARCHITECTURE The AD6657 architecture consists of quad front-end sample- and-hold circuits, followed by pipelined, switched-capacitor ADCs. The quantized outputs from each stage are combined into a final 14-bit result in the digital correction logic. Alter- ...
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Differential Input Configurations Optimum performance is achieved when driving the AD6657 in a differential input configuration. For baseband applications, the AD8138, ADA4937-2, and ADA4938-2 provide excellent performance and a flexible interface to the ADC. The output common-mode voltage of the ...
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AD6657 ANALOG INPUT INPUT Z = 50Ω AD8376 NOTES 1. ALL INDUCTORS ARE COILCRAFT 0603CS COMPONENTS For the popular IF band of 140 MHz, Figure 34 shows an example of a 1:4 transformer passive configuration where a differential inductor is ...
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If a low jitter clock source is not available, another option is to ac-couple a differential PECL signal to the sample clock input pins, as shown in Figure 39. The AD9510/AD9511/AD9512/ AD9513/AD9514/AD9515/AD9516 clock drivers offer excellent jitter performance. 0.1µF CLOCK ...
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AD6657 Jitter Considerations High speed, high resolution ADCs are sensitive to the quality of the clock input. The degradation in SNR from the low frequency SNR (SNR ) at a given input frequency (f LF can be calculated by 2 ...
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DIGITAL OUTPUTS The AD6657 output drivers are configured to interface with LVDS outputs using a DRVDD supply voltage of 1.8 V. The output bits are DDR LVDS as shown in Figure 2. Applications that require the ADC to drive large ...
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AD6657 NOISE SHAPING REQUANTIZER (NSR) The AD6657 features a noise shaping requantizer (NSR) to allow higher than 11-bit SNR to be maintained in a subset of the Nyquist band. The harmonic performance of the receiver is unaffected by the NSR ...
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Figure 48 to Figure 50 show the typical spectrum that can be expected from the AD6657 in the 33% BW mode for three different tuning words 184.32MSPS NSR 33% BW MODE ...
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AD6657 BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST The AD6657 includes built-in test features designed to verify the integrity of each channel and to facilitate board-level debug- ging. A BIST (built-in self-test) feature is included that verifies the integrity of the ...
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SERIAL PORT INTERFACE (SPI) The AD6657 serial port interface (SPI) allows the user to con- figure the receiver for specific functions or operations through a structured internal register space. The SPI provides added flexibility and customization, depending on the application. ...
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AD6657 MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Each row in the memory map register table has eight bit loca- tions (see Table 13). The memory map is roughly divided into four sections: the chip configuration registers (Address 0x00 ...
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MEMORY MAP REGISTER TABLE All address and bit locations that are not included in Table 13 are not currently supported for this device. Table 13. Memory Map Registers Addr. Register (MSB) (Hex) Name Bit 7 Bit 6 Chip Configuration Registers ...
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AD6657 Addr. Register (MSB) (Hex) Name Bit 7 Bit 6 0x0D Test mode Open Open (local) 0x0E BIST enable Open Open (local) 0x10 Offset adjust Open Open (local) 0x14 Output mode Open Open (local) 0x15 Output adjust Open Open (local) ...
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Addr. Register (MSB) (Hex) Name Bit 7 Bit 6 0x24 BIST signature LSB (local) 0x25 BIST signature MSB (local) Digital Feature Control Registers 0x3A Sync control Open Open (global) 0x3C NSR control Open Open (local) 0x3E NSR tuning Open Open ...
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AD6657 APPLICATIONS INFORMATION DESIGN GUIDELINES Before starting the design and layout of the AD6657 in a system recommended that the designer become familiar with these guidelines, which discuss the special circuit connections and layout requirements needed for certain ...
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... OUTLINE DIMENSIONS 1.40 MAX ORDERING GUIDE 1 Model Temperature Range AD6657BBCZ −40°C to +85°C AD6657BBCZRL −40°C to +85°C AD6657EBZ RoHS Compliant Part. 10.10 10. 9.90 BALL A1 INDICATOR 8.80 BSC SQ TOP VIEW BOTTOM VIEW 0.80 BSC DETAIL A 0.43 MAX 0.25 MIN 0.55 ...
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AD6657 NOTES ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08557-0-7/10(A) Rev Page ...