AD760AQ Analog Devices Inc, AD760AQ Datasheet
AD760AQ
Specifications of AD760AQ
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AD760AQ Summary of contents
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FEATURES ±0.2 LSB (±0.00031%) Typ Peak DNL and INL ±0.5 LSB (±0.00076%) Typ Unipolar Offset, Bipolar Zero 17-Bit Monotonicity Guaranteed 18-Bit Resolution (in Serial Mode) Complete 16/18-Bit D/A Function On-Chip Output Amplifier On-Chip Buried Zener Voltage Reference Microprocessor Compatible ...
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... Current (No Load 5 2 Power Supply Sensitivity with OUT Power Dissipation (Static, No Load) TEMPERATURE RANGE Specified Performance ( +25° + AD760AQ Min 16/18 2 +85° 9. –10 5 0.9 2.0 0 2.4 +14.25 –15.75 +4.75 –21 –40 –2– = – unless otherwise noted) LL Typ Max Units Bits ± ...
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NOTES 1 For 18-bit resolution, 1 LSB = 0.00038% of FSR. For 16-bit resolution, 1 LSB = 0.0015% of FSR. For 14-bit resolution, 1 LSB = 0.006% of FSR. FSR stands for full-scale range and unipolar ...
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AD760 TIMING CHARACTERISTICS Limit Parameter +25°C T MIN (Figure 1a BES BEH t 200 350 (Figure 1b) ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Model AD760AQ CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. ...
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AD760 DEFINITIONS OF SPECIFICATIONS INTEGRAL NONLINEARITY: Analog Devices defines inte- gral nonlinearity as the maximum deviation of the actual, ad- justed DAC output from the ideal analog output (a straight line drawn from – 1 LSB) for ...
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CALIBRATED LINEARITY PERFORMANCE The cumulative probability plots for the AD760 INL and DNL shown in Figures 3 and 4 represent the maximum absolute- value (peak) linearity error for each part. Roughly 100 parts from each of 3 wafer lots were ...
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AD760 AD760 REFIN 25 REFOUT +10V REF 26 9.95k 10k 24 SPAN/ 10k BIP OFF MAIN DAC 23 V Figure 6a ±10 V Bipolar Voltage Output Gain Error can be adjusted to zero using the circuit shown ...
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The digital-to-analog glitch impulse is specified as 15 nV-s typi- cal. Figure 8c shows the typical glitch impulse characteristic at the code 011 . . . 111 to 100 . . . 000 transition when loading the second rank register ...
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AD760 Byte Mode Operation is enabled by setting SER high, which configures DB0–DB7 as data inputs. In this mode HBE and LBE are used to identify the data as either the high byte or the low byte of the 16-bit ...
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The HC11 generates the requisite 8 clock pulses with data valid on the rising edges. After the most significant byte is transmit- ted, the least significant byte (LSBY) is loaded from memory and transmitted in a similar fashion. To complete ...
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AD760 One feature that the AD760 incorporates to help the user layout is that the analog pins ( REF OUT, REF IN, SPAN BIP OFFSET MUX , MUX OUT OUT IN cent to ...