AD8042ARZ-REEL7 Analog Devices Inc, AD8042ARZ-REEL7 Datasheet - Page 12

• Manufacturer Part Number: AD8042ARZ-REEL7
• Description: IC,Operational Amplifier,DUAL,BIPOLAR,SOP,8PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Voltage Feedback Amplifierr

Specifications of AD8042ARZ-REEL7

• Design Resources: Single-Ended-to-Differential Converters for Voltage Output and Current Output DACs Using AD8042 (CN0143)
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Slew Rate: 225 V/µs
• -3db Bandwidth: 170MHz
• Current - Input Bias: 1.2µA
• Voltage - Input Offset: 3000µV
• Current - Supply: 6mA
• Current - Output / Channel: 50mA
• Voltage - Supply, Single/dual (±): 3 V ~ 12 V, ±1.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Rail/rail I/o Type: Rail to Rail Output
• Number Of Elements: 2
• Common Mode Rejection Ratio: 68dB
• Input Offset Voltage: 9mV
• Input Bias Current: 3.2uA
• Single Supply Voltage (typ): 5/9V
• Dual Supply Voltage (typ): ±3/±5V
• Power Dissipation: 900mW
• Voltage Gain In Db: 100dB
• Power Supply Rejection Ratio: 72dB
• Power Supply Requirement: Single/Dual
• Shut Down Feature: No
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 12V
• Dual Supply Voltage (min): ±1.5V
• Dual Supply Voltage (max): ±6V
• Technology: BiCOM
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: Compliant

AD8042
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION
The AD8042 is fabricated on the Analog Devices, Inc.,
proprietary eXtra-Fast Complementary Bipolar (XFCB)
process, which enables the construction of PNP and NPN
transistors with similar f
process is dielectrically isolated to eliminate the parasitic and
latch-up problems caused by junction isolation. These features
allow the construction of high frequency, low distortion
amplifiers with low supply currents. This design uses a
differential output input stage to maximize bandwidth and
headroom (see Figure 35). The smaller signal swings required
on the first stage outputs (nodes SIP, SIN) reduce the effect of
nonlinear currents due to junction capacitances and improve
the distortion performance. With this design, harmonic distortion
of better than −77 dB @ 1 MHz into 100 Ω with V
(gain = +2) on a single 5 V supply is achieved.
V
The rail-to-rail output range of the AD8042 is provided by a
complementary common-emitter output stage. High output
drive capability is provided by injecting all output stage predriver
currents directly into the bases of the output devices Q8 and
Q36. Biasing of Q8 and Q36 is accomplished by I8 and I5, along
with a common-mode feedback loop (not shown). This circuit
topology allows the AD8042 to drive 40 mA of output current
with the outputs within 0.5 V of the supply rails.
On the input side, the device can handle voltages from 0.2 V
below the negative rail to within 1.2 V of the positive rail.
Exceeding these values does not cause phase reversal; however,
the input ESD devices do begin to conduct if the input voltages
exceed the rails by greater than 0.5 V.
V
V
V
IN
IN
CC
EE
N
P
Q13
R15
C7
R2
I1
Q17
R26
Q2
Q4
R5
Q40
SIP
V
Figure 35. Simplified Schematic
EE
I10
Q3
Q5
R39
R21
t
s in the 2 GHz to 4 GHz region. The
SIN
Q11
R3
I2
Q22
I3
Q7
Q25
Q24
I7
Q51
Q21
R23 R27
Q27
Q39
Q50
Q47
Q31
Q23
OUT
I9
V
= 2 V p-p
CC
V
EE
C9
I8
C3
I5
Q36
Q8
Rev. E | Page 12 of 16
V
OUT
DRIVING CAPACITIVE LOADS
The capacitive load drive of the AD8042 can be increased by
adding a low valued resistor in series with the load. Figure 36
shows the effects of a series resistor on capacitive drive for
varying voltage gains. As the closed-loop gain is increased, the
larger phase margin allows for larger capacitive loads with less
overshoot. Adding a series resistor with lower closed-loop gains
accomplishes the same effect. For large capacitive loads, the
frequency response of the amplifier is dominated by the roll-off
of the series resistor and capacitive load.
OVERDRIVE RECOVERY
Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this overdrive
condition. As shown in Figure 37, the AD8042 recovers within
30 ns from negative overdrive and within 25 ns from positive
overdrive.
5.0V
2.5V
0V
1000
100
10
Figure 36. Capacitive Load Drive vs. Closed-Loop Gain
1
V
200mV STEP WITH 90% OVERSHOOT
S
R
1V
S
= 5V
= 20Ω
Figure 37. Overdrive Recovery
2
CLOSED-LOOP GAIN (V/V)
G = +2
V
V
R
S
IN
L
R
= 5V
= 1kΩ TO 2.5V
= 5V p-p
S
C
L
3
R
S
R
= 5Ω
S
= 0Ω
4
50ns
5