AD8400ARZ1-REEL Analog Devices Inc, AD8400ARZ1-REEL Datasheet - Page 5

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AD8400ARZ1-REEL

Manufacturer Part Number
AD8400ARZ1-REEL
Description
IC,Digital Potentiometer,CMOS,SOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8400ARZ1-REEL

Taps
256
Resistance (ohms)
1K
Number Of Circuits
1
Temperature Coefficient
500 ppm/°C Typical
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
1.00K
Number Of Elements
1
# Of Taps
256
Resistance (max)
1KOhm
Power Supply Requirement
Single
Interface Type
Serial (3-Wire/SPI)
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8400ARZ1-REEL
Manufacturer:
AD
Quantity:
887
Parameter
DYNAMIC CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
Typical represents average readings at 25°C and V
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.
I
V
INL and DNL are measured at V
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
resistor terminals are left open circuit.
Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
Worst-case supply current is consumed when the input logic level is at 2.4 V, a standard characteristic of CMOS logic. See Figure 28 for a plot of I
P
W
All dynamic characteristics use V
Measured at a V
AB
DISS
Bandwidth −3 dB
Total Harmonic Distortion
V
Resistor Noise Voltage
Crosstalk
= 50 μA for V
W
= V
is calculated from (I
Settling Time
DD
, wiper (V
11
DD
W
= 3 V and I
W
pin where an adjacent V
) = no connect.
DD
× V
W
DD
= 400 μA for V
W
). CMOS logic level inputs result in minimum power dissipation.
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
DD
6, 10
= 5 V.
W
Symbol
BW_10 K
THD
t
e
C
DD
pin is making a full-scale voltage change.
S
NWB
T
= 5 V for the 10 kΩ versions.
W
DD
= 5 V.
Conditions
R = 10 kΩ
V
V
R
V
A
A
WB
A
= 1 V rms + 2 V dc, V
= V
= V
= 5 kΩ, f = 1 kHz, RS = 0
DD
DD
, V
, V
B
B
Rev. E | Page 5 of 32
= 0 V, ±1% error band
= 0 V
B
= 2 V dc, f = 1 kHz
Min
AD8400/AD8402/AD8403
A
= V
Typ
600
0.003
2
9
−65
DD
and V
1
B
DD
= 0 V.
Max
vs. logic voltage.
Unit
kHz
%
μs
nV/√Hz
dB

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