AD9832BRU-REEL Analog Devices Inc, AD9832BRU-REEL Datasheet - Page 11

• Manufacturer Part Number: AD9832BRU-REEL
• Description: IC,Numeric-Controlled Oscillator,CMOS,TSSOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9832BRU-REEL

• Rohs Status: RoHS non-compliant
• Resolution (bits): 10 b
• Master Fclk: 25MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 2.97 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• For Use With: EVAL-AD9832EBZ - BOARD EVAL FOR AD9832

TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are zero scale, a point 0.5 LSB
below the first code transition (000 . . . 00 to 000 . . . 01) and full
scale, a point 0.5 LSB above the last code transition (111 . . . 10
to 111 . . . 11). The error is expressed in LSBs.
Differential Nonlinearity
This is the difference between the measured and ideal 1 LSB
change between two adjacent codes in the DAC.
Signal-to-Noise-and-Distortion Ratio
It is measured signal to noise at the output of the DAC. The
signal is the rms magnitude of the fundamental. Noise is the
rms sum of all the nonfundamental signals up to half the
sampling frequency (f
The signal-to-noise-and-distortion ratio is dependent on the
number of quantization levels used in the digitization process;
the more levels, the smaller the quantization noise. The theoretical
signal-to-noise-and-distortion ratio for a sine wave input is
where N is the number of bits. Thus, for an ideal 10-bit converter,
the signal-to-noise-and-distortion ratio = 61.96 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the rms value of
the fundamental. For the AD9832, THD is defined as
where:
V
V
through the sixth harmonic.
1
2
, V
is the rms amplitude of the fundamental.
Signal-to-Noise-and-Distortion = (6.02N + 1.76) dB
THD
3
, V
4
, V
=
5
20
, and V
log
6
MCLK
are the rms amplitudes of the second
V
2
2
/2) but excluding the dc component.
+
V
3
2
+
V
V
1
4
2
+
V
5
2
+
V
6
2
Rev. B | Page 11 of 24
Output Compliance
The output compliance refers to the maximum voltage that can
be generated at the output of the DAC to meet the specifications.
When voltages greater than those specified for the output
compliance are generated, the AD9832 may not meet the
specifications listed in the data sheet.
Spurious-Free Dynamic Range (SFDR)
Along with the frequency of interest, harmonics of the fundamental
frequency and images of the MCLK frequency are present at the
output of a DDS device. SFDR refers to the largest spur or harmonic
present in the band of interest. The wide-band SFDR gives the
magnitude of the largest harmonic or spur relative to the magnitude
of the fundamental frequency in the bandwidth ±2 MHz about
the fundamental frequency. The narrowband SFDR gives the
attenuation of the largest spur or harmonic in a bandwidth of
±50 kHz about the fundamental frequency.
Clock Feedthrough
There is feedthrough from the MCLK input to the analog output.
Clock feedthrough refers to the magnitude of the MCLK signal
relative to the fundamental frequency in the output spectrum of
the AD9832.
AD9832