AD9832BRUZ-REEL Analog Devices Inc, AD9832BRUZ-REEL Datasheet - Page 19

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AD9832BRUZ-REEL

Manufacturer Part Number
AD9832BRUZ-REEL
Description
IC,Numeric-Controlled Oscillator,CMOS,TSSOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9832BRUZ-REEL

Resolution (bits)
10 b
Master Fclk
25MHz
Tuning Word Width (bits)
32 b
Voltage - Supply
2.97 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD9832EBZ - BOARD EVAL FOR AD9832
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9832BRUZ-REEL7
Manufacturer:
KOA
Quantity:
400 000
APPLICATIONS INFORMATION
The AD9832 contains functions that make it suitable for
modulation applications. The part can be used to perform
simple modulation, such as FSK, and more complex modulation
schemes, such as GMSK and QPSK, can also be implemented
using the AD9832. In an FSK application, the two frequency
registers of the AD9832 are loaded with different values; one
frequency represents the space frequency while the other represents
the mark frequency. The digital data stream is fed to the FSELECT
pin, which causes the AD9832 to modulate the carrier frequency
between the two values.
The AD9832 has four phase registers; this enables the part to
perform PSK. With phase shift keying, the carrier frequency is
phase shifted, the phase being altered by an amount which is
related to the bit stream being input to the modulator. The
presence of four shift registers eases the interaction needed
between the DSP and the AD9832.
The AD9832 is also suitable for signal generator applications.
With its low current consumption, the part is suitable for
applications where it can be used as a local oscillator. In addition,
the part is fully specified for operation with a 3.3 V ± 10%
power supply. Therefore, in portable applications where current
consumption is an important issue, the AD9832 is perfect.
GROUNDING AND LAYOUT
The printed circuit board (PCB) that houses the AD9832
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. This
facilitates the use of ground planes that can be easily separated.
A minimum etch technique is generally best for ground planes
because it gives the best shielding. Digital and analog ground
planes should only be joined in one place. If the AD9832 is the
only device requiring an AGND-to-DGND connection, the
ground planes should be connected at the AGND and DGND
pins of the AD9832. If the AD9832 is in a system where multiple
devices require AGND-to-DGND connections, the connection
should be made at one point only, a star ground point that
should be established as close as possible to the AD9832.
Avoid running digital lines under the device as these couple
noise onto the die. The analog ground plane should be allowed
to run under the AD9832 to avoid noise coupling. The power
supply lines to the AD9832 should use as large a track as possible
to provide low impedance paths and reduce the effects of glitches
on the power supply line. Fast switching signals, such as clocks,
should be shielded with digital ground to avoid radiating noise
to other sections of the board. Avoid crossover of digital and analog
signals. Traces on opposite sides of the board should run at right
angles to each other, which reduces the effects of feedthrough
through the board. A microstrip technique is by far the best,
but it is not always possible with a double-sided board. In this
technique, the component side of the board is dedicated to
ground planes, while signals are placed on the other side.
Rev. B | Page 19 of 24
Good decoupling is important. The analog and digital supplies
to the AD9832 are independent and separately pinned out to
minimize coupling between analog and digital sections of the
device. All analog and digital supplies should be decoupled to
AGND and DGND, respectively, with 0.1 μF ceramic capacitors
in parallel with 10 μF tantalum capacitors. To achieve the best
from the decoupling capacitors, they should be placed as close
as possible to the device, ideally right up against the device. In
systems where a common supply is used to drive both the AVDD
and DVDD of the AD9832, it is recommended that the AVDD
supply of the system be used. This supply should have the
recommended analog supply decoupling between the AVDD
pins of the AD9832 and AGND and the recommended digital
supply decoupling capacitors between the DVDD pins and DGND.
INTERFACING THE AD9832 TO MICROPROCESSORS
The AD9832 has a standard serial interface that allows the part
to interface directly with several microprocessors. The device
uses an external serial clock to write the data/control information
into the device. The serial clock can have a frequency of 20 MHz
maximum. The serial clock can be continuous, or it can idle
high or low between write operations. When data/control
information is being written to the AD9832, FSYNC is taken
low and held low while the 16 bits of data are being written into
the AD9832. The FSYNC signal frames the 16 bits of information
being loaded into the AD9832.
AD9832 TO ADSP-21xx INTERFACE
Figure 28 shows the serial interface between the AD9832 and
the ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103
should be set up to operate in SPORT transmit alternate framing
mode (TFSW = 1). The ADSP-2101/ADSP-2103 is programmed
through the SPORT control register and should be configured
as follows: internal clock operation (ISCLK = 1), active low
framing (INVTFS = 1), 16-bit word length (SLEN = 15),
internal frame sync signal (ITFS = 1), and a frame sync for each
write operation (TFSR = 1) must be generated. Transmission is
initiated by writing a word to the Tx register after SPORT is
enabled. The data is clocked out on each rising edge of the serial
clock and clocked into the AD9832 on the SCLK falling edge.
Figure 28. ADSP-2101/ADSP-2103 to AD9832 Interface
*ADDITIONAL PINS OMITTED FOR CLARITY.
ADSP-2101/
ADSP-2103*
SCLK
TFS
DT
FSYNC
SDATA
SCLK
AD9832*
AD9832

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