ADP5020CP-EVALZ Analog Devices Inc, ADP5020CP-EVALZ Datasheet - Page 5

• Manufacturer Part Number: ADP5020CP-EVALZ
• Description: EB PMU For Digital Imaging Module
• Manufacturer: Analog Devices Inc

Specifications of ADP5020CP-EVALZ

• Design Resources: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
• Main Purpose: DC/DC, Step Down with LDO
• Outputs And Type: 3, Non-Isolated
• Voltage - Output: 3.3V, 1.2V, 1.8V
• Current - Output: 600mA, 250mA, 150mA
• Voltage - Input: 2.4 ~ 5.5 V
• Regulator Topology: Buck
• Frequency - Switching: 3MHz
• Board Type: Fully Populated
• Utilized Ic / Part: ADP5020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SWITCHING SPECIFICATIONS
Table 2.
Parameter
SWITCHING FREQUENCY
SYNC CLOCK DIVIDER RATIO
SYNC CHARACTERISTICS
DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 1 REGULATOR
Table 3.
Parameter
OUTPUT VOLTAGE
VOUT1 REGULATION
CURRENT
POWER
SWITCH CURRENT LIMIT
MINIMUM ON TIME
MAXIMUM DUTY CYCLE
SOFT START TIME
C
1
2
3
See
V
V
OUT
DD1
DD1
CH1
CH2
Frequency Range
Frequency Duty Cycle
Signal
Input Current
Range
Initial Accuracy
Total Accuracy
Load Regulation
Line Regulation
Maximum Output Current
Quiescent Current
Low-Side Power nMOSFET
High-Side Power pMOSFET
DISCHARGE SWITCH ON RESISTANCE
Table 13
DC Coupling Level
Low Level Input Voltage
High Level Input Voltage
DC Coupling
AC Coupling Level
AC Coupling Capacitor
= 3.1 V to 5.5 V, I
= 3.7 V to 5.5 V, I
1
(the BUCK1_VSEL register, Address 0x01) for details.
LOAD
LOAD
is less than 200 mA. For tight regulation, the supply voltage must be 0.6 V higher than the output voltage.
is more than 200 mA. For tight regulation, the supply voltage must be 1.2 V higher than the output voltage.
f
f
RATIO
RATIO
f
f
f
V
V
I
V
I
I
R
I
D
Symbol
V
V
Symbol
R
t
t
R
SYNC
BK1MAX
QBK1
CL1
SW1
SW2
SYNC1
SYNC2
SYNCDUTY
MIN1
SS1
IL
IH
SYNC
CAC-PP
OUT1
DSON1
DSON1
DIS1
MAX1
DIV
DIV
Conditions
Sync disabled
Sync disabled
SYNC_9P6 = 1
SYNC_19P2 = 1
Sine wave, peak-to-peak
SYNC_9P6 = 1, or SYNC_19P2 = 1
Conditions
3-bit range
T
V
I
V
V
I
I
I
LOAD
LOAD
D
D
A
DD1
DDA
DD1
= 400 mA
= 400 mA
= 25°C, V
3
3
= 20 mA to 600 mA
= 1.8 V, V
, V
= 0 mA
, I
LOAD
OUT1
Rev. 0 | Page 5 of 28
= 50 mA to 600 mA
= 2.5 V to 3.7 V
DD1
2
DD1
, V
2, 3
OUT1
= 3.3 V, I
LOAD
= 20 mA
Min
2.5
2.5
40
0.7 × V
0
0.5
Min
2.5
−1
−5
0.8
0.7
DD_IO
Typ
3
3
3
6
9.6
19.2
50
1.0
10
50
Typ
0.2
0.15
4
175
250
1.2
55
88
1.4
1
Max
3.6
3.6
60
0.3 × V
V
V
Max
3.7
+1
+4
600
6
250
400
1.6
95
1.3
DD_IO
DD_IO
ADP5020
DD_IO
Unit
V
%
%
%
%
mA
mA
mΩ
mΩ
A
ns
%
ms
kΩ
Unit
MHz
MHz
MHz
MHz
%
V
V
V
V
nF
μA