ADSP-2105BP-80 Analog Devices Inc, ADSP-2105BP-80 Datasheet - Page 35

IC,DSP,16-BIT,CMOS,LDCC,68PIN,PLASTIC

ADSP-2105BP-80

Manufacturer Part Number
ADSP-2105BP-80
Description
IC,DSP,16-BIT,CMOS,LDCC,68PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2105BP-80

Rohs Status
RoHS non-compliant
Interface
Synchronous Serial Port (SSP)
Clock Rate
20MHz
Non-volatile Memory
External
On-chip Ram
3kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Package
68PLCC
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
20 MHz
Ram Size
1.5 KB
Device Million Instructions Per Second
20 MIPS
Lead Free Status / RoHS Status

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REV. B
TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
SERIAL PORTS
Parameter
Timing Requirement:
t
t
t
t
Switching Characteristic:
t
t
t
t
t
t
t
t
t
t
*Maximum serial port operating frequency is 13.824 MHz for all processor speed grades except the 12.5 MHz ADSP-2101 and 13.0 MHz ADSP-2111.
SCK
SCS
SCH
SCP
CC
SCDE
SCDV
RH
RD
SCDH
TDE
TDV
SCDD
RDV
FRAME DELAY 0 {MFD = 0} )
SCLK Period
DR/TFS/RFS Setup before SCLK Low
DR/TFS/RFS Hold after SCLK Low
SCLK
CLKOUT High to SCLK
SCLK High to DT Enable
SCLK High to DT Valid
TFS/RFS
TFS/RFS
DT Hold after SCLK High
TFS (Alt) to DT Enable
TFS (Alt) to DT Valid
SCLK High to DT Disable
RFS (Multichannel, Frame Delay Zero)
to DT Valid
( MULTICHANNEL MODE,
IN
FRAME MODE )
Width
( ALTERNATE
OUT
OUT
CLKOUT
Hold after SCLK High
Delay from SCLK High
RFS
TFS
RFS
TFS
SCLK
RFS
TFS
OUT
OUT
DR
DT
IN
IN
OUT
t
t
t
SCDE
CC
SCDV
t
t
t
t
RD
RH
TDE
TDV
t
RDV
12.5 MHz
Min Max
8
10
30
20
0
0
0
0
80
Figure 34. Serial Ports
35
20
20
18
25
20
t
t
CC
SCS
t
SCH
–35–
13.0 MHz
Min Max
76.9
8
10
28
19.2 34.2
0
0
0
0
t
SCDH
20
20
18
25
20
13.824 MHz*
Min Max
72.3
8
10
28
18.1 33.1
0
0
0
0
t
SCDD
t
SCP
20
20
18
25
20
t
SCK
Frequency
Dependency
Min
0.25t
t
SCP
CK
Max
0.25t
ADSP-21xx
CK
+ 15ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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