AM29LV017D-90FC AMD (ADVANCED MICRO DEVICES), AM29LV017D-90FC Datasheet
AM29LV017D-90FC
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AM29LV017D-90FC Summary of contents
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... Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV017D and is the factory-recommended migration path. Please refer to the S29AL016D datasheet for specifications and ordering information. Availability of this docu- ment is retained for reference and historical purposes only. ...
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... CMOS 3.0 Volt-only Uniform Sector Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV017D and is the factory-recommended migration path. Please refer to the S29AL016D datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... GENERAL DESCRIPTION The Am29LV017D Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes. The device is offered in 48-ball FBGA and 40-pin TSOP packages. The byte-wide (x8) data appears on DQ7–DQ0. All read, program, and erase operations are accomplished using only a single power supply. The device can also be programmed in standard EPROM programmers ...
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... Automatic Sleep Mode ........................................................... 11 RESET#: Hardware Reset Pin ............................................... 11 Output Disable Mode .............................................................. 11 Table 2. Am29LV017D Sector Address Table ................................ 12 Autoselect Mode ..................................................................... 13 Table 3. Am29LV017D Autoselect Codes (High Voltage Method).. 13 Sector Protection/Unprotection ............................................... 13 Temporary Sector Unprotect .................................................. 13 Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 14 Figure 2. Temporary Sector Unprotect Operation........................... 15 Hardware Data Protection ...................................................... 15 Low V Write Inhibit ...
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... Command Register CE# OE# V Detector CC A0–A20 8 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29LV017D Am29LV017D -70 -90 -120 70 90 120 70 90 120 – DQ0 DQ7 Input/Output Buffers Data STB Latch Y-Gating Cell Matrix ...
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... A17 A20 3 A19 4 A10 5 DQ7 6 DQ6 7 DQ5 8 DQ4 DQ3 13 DQ2 14 DQ1 15 DQ0 40-Pin Standard TSOP 40-Pin Reverse TSOP Am29LV017D A17 A20 37 A19 36 A10 DQ7 35 DQ6 34 DQ5 33 DQ4 DQ3 27 DQ2 26 DQ1 25 DQ0 A16 39 A15 38 A14 37 A13 36 A12 35 A11 34 A9 ...
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... FBGA (Top View, Balls Facing Down A14 A13 A15 A16 A17 A11 A12 A19 A10 WE# RESET DQ5 RY/BY DQ2 DQ3 A18 A6 A5 DQ0 CE# Am29LV017D G6 H6 A20 DQ6 DQ7 DQ4 DQ1 ...
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... Pin not connected internally Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150 ° C for prolonged periods of time. LOGIC SYMBOL 21 A0–A20 DQ0–DQ7 CE# OE# WE# RESET# Am29LV017D 8 RY/BY# 11 ...
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... Reverse Pinout (TSR040 48-ball Fine-Pitch Ball Grid Array (FBGA) 0.80 mm pitch package (FBC048) SPEED OPTION See Product Selector Guide and Valid Combinations Valid Combinations for FBGA Packages Order Number Am29LV017D-70 ED, EF Am29LV017D-90 Am29LV017D-120 Am29LV017D Package Marking L017D70V WCC, WCI L017D70V WCD ...
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... The command register it- self does not occupy any addressable memory loca- tion. The register is composed of latches that store the commands, along with the address and data informa- tion needed to execute the command. The contents of Table 1. Am29LV017D Device Bus Operations Operation Read Write Standby ...
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... Refer to the AC Characteristics tables for RESET# pa- rameters and to Figure 14 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high imped- ACC ance state. Am29LV017D in the DC CC4 , the RP ±0.3 V, the device RESET# is held CC4 ± ...
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... Table 2. Am29LV017D Sector Address Table Sector A20 A19 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 SA8 0 1 SA9 0 1 SA10 0 1 SA11 0 1 SA12 0 1 SA13 0 1 SA14 0 1 SA15 0 1 SA16 ...
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... When using programming equipment, the autoselect mode requires V (11 12 address pin ID A9. Address pins A6, A1, and A0 must be as shown in Table 3. Am29LV017D Autoselect Codes (High Voltage Method) Description CE# Manufacturer ID: AMD L Device ID: Am29LV017D L ...
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... Reset PLSCNT = 1 Increment PLSCNT No PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Am29LV017D START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...
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... Power-Up Write Inhibit If WE up, the device does not accept commands on the rising edge of WE#. The internal state machine ray power-up. Am29LV017D power-up and CC is less than V , the device does not ac- LKO . The system must provide the LKO is greater than V ...
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... N Max. timeout for byte/word write 2 N Max. timeout for buffer write 2 times typical Max. timeout per individual block erase 2 N Max. timeout for full chip erase 2 times typical (00h = not supported) Am29LV017D Description Description N µs N µs (00h = not supported (00h = not supported) ...
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... Not Supported Number of sectors in per group Sector Temporary Unprotect Not Supported Supported Sector Protect/Unprotect scheme 01 = 29F040 mode 29F016 mode 29F400 mode 29LV800A mode Simultaneous Operation Not Supported Supported Burst Mode Type Not Supported Supported Page Mode Type Not Supported Word Page Word Page Am29LV017D N ...
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... DQ7, DQ6, or RY/BY#. See “Write Operation Status” for in- formation on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- ming operation. The Byte Program command se- Am29LV017D ID 21 ...
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... Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Am29LV017D START Write Program Command Sequence Data Poll ...
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... The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows reading autoselect codes even at addresses within erasing sectors, since the codes are not stored in the memory array. When the Am29LV017D 23 ...
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... START Write Erase Command Sequence Data Poll from System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 8 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 4. Erase Operation Am29LV017D Embedded Erase algorithm in progress ...
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... Command Definitions Table 8. Am29LV017D Command Definitions Command Sequence First (Note 1) Addr Read (Note Reset (Note 6) 1 XXX Manufacturer ID 4 XXX Auto- Device ID 4 XXX select XXX Sector Protect (Note 7) 4 Verify (Note 8) XXX CFI Query (Note Byte Program 4 XXX Unlock Bypass ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 5. Data# Polling Algorithm Am29LV017D Yes Yes PASS ...
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... DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation still toggling, the device did not completed the operation successfully, and the system Am29LV017D 27 ...
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... Operation Not Complete, Write Reset Command Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 6. Toggle Bit Algorithm Am29LV017D (Note 1) No (Notes Program/Erase Operation Complete ...
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... Table 9 shows the outputs for DQ3. Table 9. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29LV017D DQ2 DQ3 (Note 2) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N ...
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... A V Supply Voltages CC V for all devices . . . . . . . . . . . . . . . .+2 3 Operating ranges define those limits between which the func- tionality of the device is guaranteed. 30 +0.8 V –0.5 V –2 +0.5 V. During +2 +0.5 V 2.0 V Am29LV017D Figure 7. Maximum Negative Overshoot Waveform Figure 8. Maximum Positive Overshoot Waveform ...
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... V RESET ± 0 ± 4.0 mA min I = –2 min I = –100 µ min . Typical specifications are for max Am29LV017D Min Typ Max Unit ± 1.0 µA 35 µA ± 1.0 µ 0.2 5 µA 0.2 5 µA 0.2 5 µA –0 11.5 12 – ...
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... DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note ° 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV017D 3000 3500 4000 3 ...
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... Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29LV017D -90, -70 -120 Unit 1 TTL gate L 30 100 0.0–3 ...
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... Outputs RESET# RY/BY Test Setup Read Toggle and Data# Polling t RC Addresses Stable t ACC OEH t CE HIGH Z Output Valid Figure 13. Read Operations Timings Am29LV017D Speed Options -70 -90 -120 Min 70 90 120 IL Max 70 90 120 IL Max 70 90 120 IL Max Max 25 30 ...
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... RY/BY# CE#, OE# RESET# RY/BY# CE#, OE# RESET# Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 14. RESET# Timings Am29LV017D All Speed Options Unit Max 20 µs Max 500 ns Min 500 ns Min 50 ns Min 20 µs Min 0 ...
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... Program/Erase Valid to RY/BY# Delay BUSY Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. 36 Speed Options -70 Min 70 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Min Min Min Am29LV017D -90 -120 Unit 90 120 ...
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... A0h t BUSY is the true data at the program address. OUT Figure 15. Program Operation Timings XXXh for chip erase WPH 55h 30h 10 for Chip Erase t BUSY Am29LV017D Read Status Data (last two cycles WHWH1 Status D OUT t RB Read Status Data WHWH2 In Complete Progress ...
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... Note Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and array data read cycle. Figure 17. Data# Polling Timings (During Embedded Algorithms Complement Complement Status Data Status Data Am29LV017D VA High Z Valid Data True High Z True Valid Data ...
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... Note: The system can use OE# or CE# to toggle DQ2/DQ6. DQ2 toggles only when read at an address within an erase-suspended sector Valid Status Valid Status (first read) (second read) Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 19. DQ2 vs. DQ6 Am29LV017D VA VA Valid Status Valid Data (stops toggling) Erase Resume Erase Erase Complete Read 39 ...
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... Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested RESET VIDR CE# WE# RY/BY# Figure 20. Temporary Sector Unprotect Timing Diagram 40 Min Min Program or Erase Command Sequence t RSP Am29LV017D All Speed Options Unit 500 ns 4 µs t VIDR ...
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... AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect Figure 21. Sector Protect/Unprotect Timing Diagram Valid* Valid* Verify 60h 40h Sector Protect: 150 µs Sector Unprotect Am29LV017D Valid* Status 41 ...
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... Sector Erase Operation (Note 2) WHWH2 WHWH2 Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. 42 -70 Min 70 Min Min 45 Min 35 Min Min Min Min Min Min 35 Min Typ Typ Am29LV017D Speed Options -90 -120 Unit 90 120 ...
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... Figure 22. Alternate CE# Controlled Write Operation Timings PA for program SA for sector erase XXX for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase = Data Out, DQ7# = complement of data written to device. OUT Am29LV017D PA DQ7# D OUT 43 ...
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... V, 1,000,000 cycles. CC –1.0 V –1.0 V –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT V IN Test Conditions 150 ° C 125 ° C Am29LV017D Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs Excludes system level overhead (Note 1,000,000 cycles. Additionally, CC Min Max 12 ...
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... PHYSICAL DIMENSIONS* TS 040—40-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. Am29LV017D Dwg rev AA; 10/99 45 ...
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... PHYSICAL DIMENSIONS TSR040—40-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 46 Am29LV017D Dwg rev AA; 10/99 ...
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... PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA package Am29LV017D Dwg rev AF; 10/99 47 ...
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... The 80 ns speed option has been deleted. The extended temperature range is no longer available. All other parameters and functions remain unchanged. Ordering Information Deleted the “U” designator from ordering part numbers for FBGA devices. Am29LV017D specifications to CC ...
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... Revision E+1 (November 7, 2000) Global Deleted burn-in option in ordering information. Added table of contents. Revision E+2 (June 10, 2004) Ordering Information Added Pb-free package OPNs. Revision E+3 (June 13, 2005) Cover Page / Title Page Added Spansion EOL cover page and added EOL dis- claimer to title page. Am29LV017D 49 ...
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... Copyright © 2005 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 50 Am29LV017D ...